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Searched refs:REG_ADC_DTOP_50_L (Results 1 – 25 of 37) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_adc.c1341 W2BYTEMSK(REG_ADC_DTOP_50_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
1417 W2BYTEMSK(REG_ADC_DTOP_50_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
2346 …ePrivate->sthal_ADC._stAutoAdcSetting.R_BlankLevel = MDrv_Read2Byte(REG_ADC_DTOP_50_L) & 0x0FFF; in Hal_ADC_auto_adc_backup()
2499 …W2BYTEMSK(REG_ADC_DTOP_50_L, pXCResourcePrivate->sthal_ADC._stAutoAdcSetting.R_BlankLevel, 0x0FFF); in Hal_ADC_auto_adc_restore()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_adc.c1341 W2BYTEMSK(REG_ADC_DTOP_50_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
1417 W2BYTEMSK(REG_ADC_DTOP_50_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
2346 …ePrivate->sthal_ADC._stAutoAdcSetting.R_BlankLevel = MDrv_Read2Byte(REG_ADC_DTOP_50_L) & 0x0FFF; in Hal_ADC_auto_adc_backup()
2505 …W2BYTEMSK(REG_ADC_DTOP_50_L, pXCResourcePrivate->sthal_ADC._stAutoAdcSetting.R_BlankLevel, 0x0FFF); in Hal_ADC_auto_adc_restore()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_adc.c1350 W2BYTEMSK(REG_ADC_DTOP_50_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
1426 W2BYTEMSK(REG_ADC_DTOP_50_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
2362 …ePrivate->sthal_ADC._stAutoAdcSetting.R_BlankLevel = MDrv_Read2Byte(REG_ADC_DTOP_50_L) & 0x0FFF; in Hal_ADC_auto_adc_backup()
2545 …W2BYTEMSK(REG_ADC_DTOP_50_L, pXCResourcePrivate->sthal_ADC._stAutoAdcSetting.R_BlankLevel, 0x0FFF); in Hal_ADC_auto_adc_restore()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_adc.c1341 W2BYTEMSK(REG_ADC_DTOP_50_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
1417 W2BYTEMSK(REG_ADC_DTOP_50_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
2346 …ePrivate->sthal_ADC._stAutoAdcSetting.R_BlankLevel = MDrv_Read2Byte(REG_ADC_DTOP_50_L) & 0x0FFF; in Hal_ADC_auto_adc_backup()
2499 …W2BYTEMSK(REG_ADC_DTOP_50_L, pXCResourcePrivate->sthal_ADC._stAutoAdcSetting.R_BlankLevel, 0x0FFF); in Hal_ADC_auto_adc_restore()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_adc.c1360 W2BYTEMSK(REG_ADC_DTOP_50_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
1436 W2BYTEMSK(REG_ADC_DTOP_50_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
2476 …ePrivate->sthal_ADC._stAutoAdcSetting.R_BlankLevel = MDrv_Read2Byte(REG_ADC_DTOP_50_L) & 0x0FFF; in Hal_ADC_auto_adc_backup()
2665 …W2BYTEMSK(REG_ADC_DTOP_50_L, pXCResourcePrivate->sthal_ADC._stAutoAdcSetting.R_BlankLevel, 0x0FFF); in Hal_ADC_auto_adc_restore()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_adc.c1352 W2BYTEMSK(REG_ADC_DTOP_50_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
1428 W2BYTEMSK(REG_ADC_DTOP_50_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
2468 …ePrivate->sthal_ADC._stAutoAdcSetting.R_BlankLevel = MDrv_Read2Byte(REG_ADC_DTOP_50_L) & 0x0FFF; in Hal_ADC_auto_adc_backup()
2657 …W2BYTEMSK(REG_ADC_DTOP_50_L, pXCResourcePrivate->sthal_ADC._stAutoAdcSetting.R_BlankLevel, 0x0FFF); in Hal_ADC_auto_adc_restore()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_adc.c1352 W2BYTEMSK(REG_ADC_DTOP_50_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
1428 W2BYTEMSK(REG_ADC_DTOP_50_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
2468 …ePrivate->sthal_ADC._stAutoAdcSetting.R_BlankLevel = MDrv_Read2Byte(REG_ADC_DTOP_50_L) & 0x0FFF; in Hal_ADC_auto_adc_backup()
2651 …W2BYTEMSK(REG_ADC_DTOP_50_L, pXCResourcePrivate->sthal_ADC._stAutoAdcSetting.R_BlankLevel, 0x0FFF); in Hal_ADC_auto_adc_restore()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_adc.c1352 W2BYTEMSK(REG_ADC_DTOP_50_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
1428 W2BYTEMSK(REG_ADC_DTOP_50_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
2468 …ePrivate->sthal_ADC._stAutoAdcSetting.R_BlankLevel = MDrv_Read2Byte(REG_ADC_DTOP_50_L) & 0x0FFF; in Hal_ADC_auto_adc_backup()
2651 …W2BYTEMSK(REG_ADC_DTOP_50_L, pXCResourcePrivate->sthal_ADC._stAutoAdcSetting.R_BlankLevel, 0x0FFF); in Hal_ADC_auto_adc_restore()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_adc.c1352 W2BYTEMSK(REG_ADC_DTOP_50_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
1428 W2BYTEMSK(REG_ADC_DTOP_50_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
2468 …ePrivate->sthal_ADC._stAutoAdcSetting.R_BlankLevel = MDrv_Read2Byte(REG_ADC_DTOP_50_L) & 0x0FFF; in Hal_ADC_auto_adc_backup()
2628 …W2BYTEMSK(REG_ADC_DTOP_50_L, pXCResourcePrivate->sthal_ADC._stAutoAdcSetting.R_BlankLevel, 0x0FFF); in Hal_ADC_auto_adc_restore()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_adc.c1366 W2BYTEMSK(REG_ADC_DTOP_50_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
2374 _stAutoAdcSetting.R_BlankLevel = MDrv_Read2Byte(REG_ADC_DTOP_50_L) & 0x0FFF; in Hal_ADC_auto_adc_backup()
2468 W2BYTEMSK(REG_ADC_DTOP_50_L, _stAutoAdcSetting.R_BlankLevel, 0x0FFF); in Hal_ADC_auto_adc_restore()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_adc.c1366 W2BYTEMSK(REG_ADC_DTOP_50_L, 0x800, 0x0FFF); in Hal_ADC_InitInternalCalibration()
2374 _stAutoAdcSetting.R_BlankLevel = MDrv_Read2Byte(REG_ADC_DTOP_50_L) & 0x0FFF; in Hal_ADC_auto_adc_backup()
2468 W2BYTEMSK(REG_ADC_DTOP_50_L, _stAutoAdcSetting.R_BlankLevel, 0x0FFF); in Hal_ADC_auto_adc_restore()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dhwreg_adc_dtop.h266 #define REG_ADC_DTOP_50_L (REG_ADC_DTOP_BASE + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_adc_dtop.h266 #define REG_ADC_DTOP_50_L (REG_ADC_DTOP_BASE + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_adc_dtop.h266 #define REG_ADC_DTOP_50_L (REG_ADC_DTOP_BASE + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_adc_dtop.h266 #define REG_ADC_DTOP_50_L (REG_ADC_DTOP_BASE + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_adc_dtop.h266 #define REG_ADC_DTOP_50_L (REG_ADC_DTOP_BASE + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_adc_dtop.h266 #define REG_ADC_DTOP_50_L (REG_ADC_DTOP_BASE + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_adc_dtop.h266 #define REG_ADC_DTOP_50_L (REG_ADC_DTOP_BASE + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_adc_dtop.h266 #define REG_ADC_DTOP_50_L (REG_ADC_DTOP_BASE + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_adc_dtop.h266 #define REG_ADC_DTOP_50_L (REG_ADC_DTOP_BASE + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_adc_dtop.h266 #define REG_ADC_DTOP_50_L (REG_ADC_DTOP_BASE + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_adc_dtop.h266 #define REG_ADC_DTOP_50_L (REG_ADC_DTOP_BASE + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_adc_dtop.h266 #define REG_ADC_DTOP_50_L (REG_ADC_DTOP_BASE + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_adc_dtop.h266 #define REG_ADC_DTOP_50_L (REG_ADC_DTOP_BASE + 0xA0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dhwreg_adc_dtop.h266 #define REG_ADC_DTOP_50_L (REG_ADC_DTOP_BASE + 0xA0) macro

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