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Searched refs:PM_MSIC_REG_BASE (Results 1 – 11 of 11) sorted by relevance

/utopia/UTPA2-700.0.x/modules/pm/hal/maldives/pm/
H A DregPM.h116 #define PM_MSIC_REG_BASE 0x2e00 //(0x1700*2) macro
142 #define REG_PM_CHIP_CFG_OVERWRITE ((PM_MSIC_REG_BASE + 0x1F * 2))
145 #define REG_PM_CPU_SW_RST ((PM_MSIC_REG_BASE + 0x29 * 2 + 1))
/utopia/UTPA2-700.0.x/modules/pm/hal/mainz/pm/
H A DregPM.h116 #define PM_MSIC_REG_BASE 0x2e00 //(0x1700*2) macro
143 #define REG_PM_CHIP_CFG_OVERWRITE ((PM_MSIC_REG_BASE + 0x1FUL * 2))
146 #define REG_PM_CPU_SW_RST ((PM_MSIC_REG_BASE + 0x29UL * 2 + 1))
/utopia/UTPA2-700.0.x/modules/pm/hal/mustang/pm/
H A DregPM.h117 #define PM_MSIC_REG_BASE 0x2e00 //(0x1700*2) macro
143 #define REG_PM_CHIP_CFG_OVERWRITE ((PM_MSIC_REG_BASE + 0x1F * 2))
146 #define REG_PM_CPU_SW_RST ((PM_MSIC_REG_BASE + 0x29 * 2 + 1))
/utopia/UTPA2-700.0.x/modules/pm/hal/messi/pm/
H A DregPM.h116 #define PM_MSIC_REG_BASE 0x2e00 //(0x1700*2) macro
143 #define REG_PM_CHIP_CFG_OVERWRITE ((PM_MSIC_REG_BASE + 0x1FUL * 2))
146 #define REG_PM_CPU_SW_RST ((PM_MSIC_REG_BASE + 0x29UL * 2 + 1))
/utopia/UTPA2-700.0.x/modules/pm/hal/mooney/pm/
H A DregPM.h116 #define PM_MSIC_REG_BASE 0x2e00 //(0x1700*2) macro
143 #define REG_PM_CHIP_CFG_OVERWRITE ((PM_MSIC_REG_BASE + 0x1FUL * 2))
146 #define REG_PM_CPU_SW_RST ((PM_MSIC_REG_BASE + 0x29UL * 2 + 1))
/utopia/UTPA2-700.0.x/modules/pm/hal/manhattan/pm/
H A DregPM.h120 #define PM_MSIC_REG_BASE (0x1700UL*2) macro
132 #define REG_PM_CPU_SW_RST ((PM_MSIC_REG_BASE + 0x29UL*2+1))
/utopia/UTPA2-700.0.x/modules/pm/hal/maserati/pm/
H A DregPM.h120 #define PM_MSIC_REG_BASE (0x1700UL*2) macro
132 #define REG_PM_CPU_SW_RST ((PM_MSIC_REG_BASE + 0x29UL*2+1))
/utopia/UTPA2-700.0.x/modules/pm/hal/macan/pm/
H A DregPM.h120 #define PM_MSIC_REG_BASE (0x1700UL*2) macro
132 #define REG_PM_CPU_SW_RST ((PM_MSIC_REG_BASE + 0x29UL*2+1))
/utopia/UTPA2-700.0.x/modules/pm/hal/M7821/pm/
H A DregPM.h120 #define PM_MSIC_REG_BASE (0x1700UL*2) macro
132 #define REG_PM_CPU_SW_RST ((PM_MSIC_REG_BASE + 0x29UL*2+1))
/utopia/UTPA2-700.0.x/modules/pm/hal/M7621/pm/
H A DregPM.h120 #define PM_MSIC_REG_BASE (0x1700UL*2) macro
132 #define REG_PM_CPU_SW_RST ((PM_MSIC_REG_BASE + 0x29UL*2+1))
/utopia/UTPA2-700.0.x/modules/pm/hal/maxim/pm/
H A DregPM.h120 #define PM_MSIC_REG_BASE (0x1700UL*2) macro
132 #define REG_PM_CPU_SW_RST ((PM_MSIC_REG_BASE + 0x29UL*2+1))