| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/ |
| H A D | mhal_mux.c | 480 …ivate->sthal_Optee.op_tee_mux.regs_cnt].value = (u8Data_Mux << 4) | (MDrv_ReadRegBit(REG_IPMUX_01_… in Hal_SC_mux_set_mainwin_ip_mux()
498 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_01_L, 0xF0)) >> 4; in Hal_SC_mux_get_mainwin_ip_mux()
499 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_IDCLK2, CKG_IDCLK2_MASK)) >> 2; in Hal_SC_mux_get_mainwin_ip_mux()
528 …rcePrivate->sthal_Optee.op_tee_mux.regs_cnt].value = (u8Data_Mux | ((MDrv_ReadRegBit(REG_IPMUX_01_… in Hal_SC_set_subwin_ip_mux()
587 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_61_L, 0xF0)) >> 4; in Hal_SC2_mux_get_mainwin_ip_mux()
588 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_MASK)) >> 2; in Hal_SC2_mux_get_mainwin_ip_mux()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_mux.c | 528 …ivate->sthal_Optee.op_tee_mux.regs_cnt].value = (u8Data_Mux << 4) | (MDrv_ReadRegBit(REG_IPMUX_01_… in Hal_SC_mux_set_mainwin_ip_mux()
546 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_01_L, 0xF0)) >> 4; in Hal_SC_mux_get_mainwin_ip_mux()
547 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_IDCLK2, CKG_IDCLK2_MASK)) >> 2; in Hal_SC_mux_get_mainwin_ip_mux()
576 …rcePrivate->sthal_Optee.op_tee_mux.regs_cnt].value = (u8Data_Mux | ((MDrv_ReadRegBit(REG_IPMUX_01_… in Hal_SC_set_subwin_ip_mux()
636 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_61_L, 0xF0)) >> 4; in Hal_SC2_mux_get_mainwin_ip_mux()
637 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_MASK)) >> 2; in Hal_SC2_mux_get_mainwin_ip_mux()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_mux.c | 528 …ivate->sthal_Optee.op_tee_mux.regs_cnt].value = (u8Data_Mux << 4) | (MDrv_ReadRegBit(REG_IPMUX_01_… in Hal_SC_mux_set_mainwin_ip_mux()
546 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_01_L, 0xF0)) >> 4; in Hal_SC_mux_get_mainwin_ip_mux()
547 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_IDCLK2, CKG_IDCLK2_MASK)) >> 2; in Hal_SC_mux_get_mainwin_ip_mux()
576 …rcePrivate->sthal_Optee.op_tee_mux.regs_cnt].value = (u8Data_Mux | ((MDrv_ReadRegBit(REG_IPMUX_01_… in Hal_SC_set_subwin_ip_mux()
636 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_61_L, 0xF0)) >> 4; in Hal_SC2_mux_get_mainwin_ip_mux()
637 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_MASK)) >> 2; in Hal_SC2_mux_get_mainwin_ip_mux()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_mux.c | 528 …ivate->sthal_Optee.op_tee_mux.regs_cnt].value = (u8Data_Mux << 4) | (MDrv_ReadRegBit(REG_IPMUX_01_… in Hal_SC_mux_set_mainwin_ip_mux()
546 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_01_L, 0xF0)) >> 4; in Hal_SC_mux_get_mainwin_ip_mux()
547 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_IDCLK2, CKG_IDCLK2_MASK)) >> 2; in Hal_SC_mux_get_mainwin_ip_mux()
576 …rcePrivate->sthal_Optee.op_tee_mux.regs_cnt].value = (u8Data_Mux | ((MDrv_ReadRegBit(REG_IPMUX_01_… in Hal_SC_set_subwin_ip_mux()
636 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_61_L, 0xF0)) >> 4; in Hal_SC2_mux_get_mainwin_ip_mux()
637 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_MASK)) >> 2; in Hal_SC2_mux_get_mainwin_ip_mux()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_mux.c | 528 …ivate->sthal_Optee.op_tee_mux.regs_cnt].value = (u8Data_Mux << 4) | (MDrv_ReadRegBit(REG_IPMUX_01_… in Hal_SC_mux_set_mainwin_ip_mux()
546 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_01_L, 0xF0)) >> 4; in Hal_SC_mux_get_mainwin_ip_mux()
547 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_IDCLK2, CKG_IDCLK2_MASK)) >> 2; in Hal_SC_mux_get_mainwin_ip_mux()
576 …rcePrivate->sthal_Optee.op_tee_mux.regs_cnt].value = (u8Data_Mux | ((MDrv_ReadRegBit(REG_IPMUX_01_… in Hal_SC_set_subwin_ip_mux()
636 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_61_L, 0xF0)) >> 4; in Hal_SC2_mux_get_mainwin_ip_mux()
637 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_MASK)) >> 2; in Hal_SC2_mux_get_mainwin_ip_mux()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_mux.c | 528 …ivate->sthal_Optee.op_tee_mux.regs_cnt].value = (u8Data_Mux << 4) | (MDrv_ReadRegBit(REG_IPMUX_01_… in Hal_SC_mux_set_mainwin_ip_mux()
546 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_01_L, 0xF0)) >> 4; in Hal_SC_mux_get_mainwin_ip_mux()
547 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_IDCLK2, CKG_IDCLK2_MASK)) >> 2; in Hal_SC_mux_get_mainwin_ip_mux()
576 …rcePrivate->sthal_Optee.op_tee_mux.regs_cnt].value = (u8Data_Mux | ((MDrv_ReadRegBit(REG_IPMUX_01_… in Hal_SC_set_subwin_ip_mux()
636 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_61_L, 0xF0)) >> 4; in Hal_SC2_mux_get_mainwin_ip_mux()
637 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_MASK)) >> 2; in Hal_SC2_mux_get_mainwin_ip_mux()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_mux.c | 528 …ivate->sthal_Optee.op_tee_mux.regs_cnt].value = (u8Data_Mux << 4) | (MDrv_ReadRegBit(REG_IPMUX_01_… in Hal_SC_mux_set_mainwin_ip_mux()
546 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_01_L, 0xF0)) >> 4; in Hal_SC_mux_get_mainwin_ip_mux()
547 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_IDCLK2, CKG_IDCLK2_MASK)) >> 2; in Hal_SC_mux_get_mainwin_ip_mux()
576 …rcePrivate->sthal_Optee.op_tee_mux.regs_cnt].value = (u8Data_Mux | ((MDrv_ReadRegBit(REG_IPMUX_01_… in Hal_SC_set_subwin_ip_mux()
634 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_61_L, 0xF0)) >> 4; in Hal_SC2_mux_get_mainwin_ip_mux()
635 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_MASK)) >> 2; in Hal_SC2_mux_get_mainwin_ip_mux()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/ |
| H A D | mhal_mux.c | 468 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_01_L, 0xF0)) >> 4; in Hal_SC_mux_get_mainwin_ip_mux()
469 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_IDCLK2, CKG_IDCLK2_MASK)) >> 2; in Hal_SC_mux_get_mainwin_ip_mux()
506 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_61_L, 0xF0)) >> 4; in Hal_SC2_mux_get_mainwin_ip_mux()
507 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_MASK)) >> 2; in Hal_SC2_mux_get_mainwin_ip_mux()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_mux.c | 520 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_01_L, 0xF0)) >> 4; in Hal_SC_mux_get_mainwin_ip_mux()
521 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_IDCLK2, CKG_IDCLK2_MASK)) >> 2; in Hal_SC_mux_get_mainwin_ip_mux()
557 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_61_L, 0xF0)) >> 4; in Hal_SC2_mux_get_mainwin_ip_mux()
558 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_S2_IDCLK2, CKG_S2_IDCLK2_MASK)) >> 2; in Hal_SC2_mux_get_mainwin_ip_mux()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/ |
| H A D | mhal_mux.c | 471 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_01_L, 0xF0)) >> 4; in Hal_SC_mux_get_mainwin_ip_mux()
472 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_IDCLK2, CKG_IDCLK2_MASK)) >> 2; in Hal_SC_mux_get_mainwin_ip_mux()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/ |
| H A D | mhal_mux.c | 471 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_01_L, 0xF0)) >> 4; in Hal_SC_mux_get_mainwin_ip_mux()
472 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_IDCLK2, CKG_IDCLK2_MASK)) >> 2; in Hal_SC_mux_get_mainwin_ip_mux()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/ |
| H A D | mhal_mux.c | 471 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_01_L, 0xF0)) >> 4; in Hal_SC_mux_get_mainwin_ip_mux()
472 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_IDCLK2, CKG_IDCLK2_MASK)) >> 2; in Hal_SC_mux_get_mainwin_ip_mux()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/ |
| H A D | mhal_mux.c | 471 *pU8Data_Mux = (MDrv_ReadRegBit(REG_IPMUX_01_L, 0xF0)) >> 4; in Hal_SC_mux_get_mainwin_ip_mux()
472 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_IDCLK2, CKG_IDCLK2_MASK)) >> 2; in Hal_SC_mux_get_mainwin_ip_mux()
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| /utopia/UTPA2-700.0.x/modules/ve/hal/k6/ve/ |
| H A D | mhal_tvencoder.c | 1225 if(!MDrv_ReadRegBit(L_BK_VE_SRC(0x10), BIT(4))) in Hal_VE_set_field_inverse()
2713 if(!MDrv_ReadRegBit(L_BK_VE_SRC(0x5C), BIT(0))) { in Hal_VE_Get_DRAM_Format()
2959 if(MDrv_ReadRegBit(L_BK_VE_ENC(0x2E), BIT(2))) in Hal_VE_GetWSSStatus()
3004 if(MDrv_ReadRegBit(L_BK_VE_ENC_EX(0x74), BIT(3))) in Hal_VE_GetDCSStatus()
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| /utopia/UTPA2-700.0.x/modules/ve/hal/kano/ve/ |
| H A D | mhal_tvencoder.c | 1206 if(!MDrv_ReadRegBit(L_BK_VE_SRC(0x10), BIT(4))) in Hal_VE_set_field_inverse()
2698 if(!MDrv_ReadRegBit(L_BK_VE_SRC(0x5C), BIT(0))) { in Hal_VE_Get_DRAM_Format()
2944 if(MDrv_ReadRegBit(L_BK_VE_ENC(0x2E), BIT(2))) in Hal_VE_GetWSSStatus()
2989 if(MDrv_ReadRegBit(L_BK_VE_ENC_EX(0x74), BIT(3))) in Hal_VE_GetDCSStatus()
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| /utopia/UTPA2-700.0.x/modules/ve/hal/curry/ve/ |
| H A D | mhal_tvencoder.c | 1209 if(!MDrv_ReadRegBit(L_BK_VE_SRC(0x10), BIT(4))) in Hal_VE_set_field_inverse()
2701 if(!MDrv_ReadRegBit(L_BK_VE_SRC(0x5C), BIT(0))) { in Hal_VE_Get_DRAM_Format()
2947 if(MDrv_ReadRegBit(L_BK_VE_ENC(0x2E), BIT(2))) in Hal_VE_GetWSSStatus()
2992 if(MDrv_ReadRegBit(L_BK_VE_ENC_EX(0x74), BIT(3))) in Hal_VE_GetDCSStatus()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/ |
| H A D | mhal_mux.c | 571 *pU8Data_Mux = (MDrv_ReadRegBit(L_BK_IPMUX(0x01), 0xF0)) >> 4; in Hal_SC_mux_get_mainwin_ip_mux()
572 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_IDCLK2, CKG_IDCLK2_MASK)) >> 2; in Hal_SC_mux_get_mainwin_ip_mux()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/ |
| H A D | mhal_mux.c | 571 *pU8Data_Mux = (MDrv_ReadRegBit(L_BK_IPMUX(0x01), 0xF0)) >> 4; in Hal_SC_mux_get_mainwin_ip_mux()
572 *pU8Clk_Mux = (MDrv_ReadRegBit(REG_CKG_IDCLK2, CKG_IDCLK2_MASK)) >> 2; in Hal_SC_mux_get_mainwin_ip_mux()
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| /utopia/UTPA2-700.0.x/modules/ve/hal/k6lite/ve/ |
| H A D | mhal_tvencoder.c | 1212 if(!MDrv_ReadRegBit(L_BK_VE_SRC(0x10), BIT(4))) in Hal_VE_set_field_inverse()
2736 if(!MDrv_ReadRegBit(L_BK_VE_SRC(0x5C), BIT(0))) { in Hal_VE_Get_DRAM_Format()
2982 if(MDrv_ReadRegBit(L_BK_VE_ENC(0x2E), BIT(2))) in Hal_VE_GetWSSStatus()
3027 if(MDrv_ReadRegBit(L_BK_VE_ENC_EX(0x74), BIT(3))) in Hal_VE_GetDCSStatus()
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| /utopia/UTPA2-700.0.x/modules/gpio/hal/curry/gpio/ |
| H A D | halGPIO.c | 669 r = MDrv_ReadRegBit(gpio_table[gpio].r_oen, gpio_table[gpio].m_oen); in HAL_Gpio_Get_InOut()
688 r = MDrv_ReadRegBit(gpio_table[gpio].r_in, gpio_table[gpio].m_in); in HAL_Gpio_Get_Level()
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| /utopia/UTPA2-700.0.x/modules/gpio/hal/mooney/gpio/ |
| H A D | halGPIO.c | 768 r = MDrv_ReadRegBit(gpio_table[gpio].r_oen, gpio_table[gpio].m_oen); in HAL_Gpio_Get_InOut()
787 r = MDrv_ReadRegBit(gpio_table[gpio].r_in, gpio_table[gpio].m_in); in HAL_Gpio_Get_Level()
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| /utopia/UTPA2-700.0.x/modules/gpio/hal/mainz/gpio/ |
| H A D | halGPIO.c | 870 r = MDrv_ReadRegBit(gpio_table[gpio].r_oen, gpio_table[gpio].m_oen); in HAL_Gpio_Get_InOut()
889 r = MDrv_ReadRegBit(gpio_table[gpio].r_in, gpio_table[gpio].m_in); in HAL_Gpio_Get_Level()
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| /utopia/UTPA2-700.0.x/modules/gpio/hal/messi/gpio/ |
| H A D | halGPIO.c | 850 r = MDrv_ReadRegBit(gpio_table[gpio].r_oen, gpio_table[gpio].m_oen); in HAL_Gpio_Get_InOut()
869 r = MDrv_ReadRegBit(gpio_table[gpio].r_in, gpio_table[gpio].m_in); in HAL_Gpio_Get_Level()
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| /utopia/UTPA2-700.0.x/modules/gpio/hal/maldives/gpio/ |
| H A D | regGPIO.h | 105 #define MDrv_ReadRegBit(u32Reg, u8Mask) \ macro
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| /utopia/UTPA2-700.0.x/modules/gpio/hal/k6/gpio/ |
| H A D | regGPIO.h | 122 #define MDrv_ReadRegBit( u32Reg, u8Mask ) \ macro
|