Home
last modified time | relevance | path

Searched refs:MDrv_DIP_Read2Byte (Results 1 – 6 of 6) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_dip.c231 #define MDrv_DIP_Read2Byte(u32Reg)\ macro
560 cmdq_ready_value = MDrv_DIP_Read2Byte(g_u32Wait_Reg[eWindow]); in HAL_XC_DIP_CMDQTriggerCommand()
1486 cmdq_wait_value = MDrv_DIP_Read2Byte(g_u32Wait_Reg[eWindow]); in HAL_XC_DIP_GetIntrStatus()
1494 cmdq_wait_value = MDrv_DIP_Read2Byte(g_u32Wait_Reg[eWindow]); in HAL_XC_DIP_GetIntrStatus()
1967 u16clk_usr_enable = MDrv_DIP_Read2Byte(REG_CKG_IDCLK_USR_ENA) &CKG_IDCLK3_USR_ENA; in HAL_XC_DIP_MuxDispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_dip.c232 #define MDrv_DIP_Read2Byte(u32Reg)\ macro
561 cmdq_ready_value = MDrv_DIP_Read2Byte(g_u32Wait_Reg[eWindow]); in HAL_XC_DIP_CMDQTriggerCommand()
1455 cmdq_wait_value = MDrv_DIP_Read2Byte(g_u32Wait_Reg[eWindow]); in HAL_XC_DIP_GetIntrStatus()
1463 cmdq_wait_value = MDrv_DIP_Read2Byte(g_u32Wait_Reg[eWindow]); in HAL_XC_DIP_GetIntrStatus()
1933 u16clk_usr_enable = MDrv_DIP_Read2Byte(REG_CKG_IDCLK_USR_ENA) &CKG_IDCLK3_USR_ENA; in HAL_XC_DIP_MuxDispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_dip.c232 #define MDrv_DIP_Read2Byte(u32Reg)\ macro
561 cmdq_ready_value = MDrv_DIP_Read2Byte(g_u32Wait_Reg[eWindow]); in HAL_XC_DIP_CMDQTriggerCommand()
1487 cmdq_wait_value = MDrv_DIP_Read2Byte(g_u32Wait_Reg[eWindow]); in HAL_XC_DIP_GetIntrStatus()
1495 cmdq_wait_value = MDrv_DIP_Read2Byte(g_u32Wait_Reg[eWindow]); in HAL_XC_DIP_GetIntrStatus()
1968 u16clk_usr_enable = MDrv_DIP_Read2Byte(REG_CKG_IDCLK_USR_ENA) &CKG_IDCLK3_USR_ENA; in HAL_XC_DIP_MuxDispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_dip.c232 #define MDrv_DIP_Read2Byte(u32Reg)\ macro
561 cmdq_ready_value = MDrv_DIP_Read2Byte(g_u32Wait_Reg[eWindow]); in HAL_XC_DIP_CMDQTriggerCommand()
1455 cmdq_wait_value = MDrv_DIP_Read2Byte(g_u32Wait_Reg[eWindow]); in HAL_XC_DIP_GetIntrStatus()
1463 cmdq_wait_value = MDrv_DIP_Read2Byte(g_u32Wait_Reg[eWindow]); in HAL_XC_DIP_GetIntrStatus()
1933 u16clk_usr_enable = MDrv_DIP_Read2Byte(REG_CKG_IDCLK_USR_ENA) &CKG_IDCLK3_USR_ENA; in HAL_XC_DIP_MuxDispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_dip.c310 #define MDrv_DIP_Read2Byte(u32Reg)\ macro
743 cmdq_ready_value = MDrv_DIP_Read2Byte(g_u32Wait_Reg[eWindow])&0xFFF ; in HAL_XC_DIP_CMDQTriggerCommand()
1672 cmdq_wait_value = MDrv_DIP_Read2Byte(g_u32Wait_Reg[eWindow]); in HAL_XC_DIP_GetIntrStatus()
1680 cmdq_wait_value = MDrv_DIP_Read2Byte(g_u32Wait_Reg[eWindow]); in HAL_XC_DIP_GetIntrStatus()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_dip.c309 #define MDrv_DIP_Read2Byte(u32Reg)\ macro
790 cmdq_ready_value = MDrv_DIP_Read2Byte(g_u32Wait_Reg[eWindow])&0xFFF ; in HAL_XC_DIP_CMDQTriggerCommand()
1771 cmdq_wait_value = MDrv_DIP_Read2Byte(g_u32Wait_Reg[eWindow]); in HAL_XC_DIP_GetIntrStatus()
1779 cmdq_wait_value = MDrv_DIP_Read2Byte(g_u32Wait_Reg[eWindow]); in HAL_XC_DIP_GetIntrStatus()