Searched refs:MAX_SRAM_SIZE (Results 1 – 11 of 11) sorted by relevance
637 #define MAX_SRAM_SIZE 0x100 in Hal_PQ_set_sram_ihc_crd_table() macro652 MS_U8 SRAM1_IHC[MAX_SRAM_SIZE]; in Hal_PQ_set_sram_ihc_crd_table()653 MS_U8 SRAM2_IHC[MAX_SRAM_SIZE]; in Hal_PQ_set_sram_ihc_crd_table()654 MS_U8 SRAM3_IHC[MAX_SRAM_SIZE]; in Hal_PQ_set_sram_ihc_crd_table()655 MS_U8 SRAM4_IHC[MAX_SRAM_SIZE]; in Hal_PQ_set_sram_ihc_crd_table()695 #define MAX_SRAM_SIZE 0x100 in Hal_PQ_set_sram_ihc_crd_table()701 MS_U8 SRAM1_IHC[MAX_SRAM_SIZE]; in Hal_PQ_set_sram_ihc_crd_table()702 MS_U8 SRAM2_IHC[MAX_SRAM_SIZE]; in Hal_PQ_set_sram_ihc_crd_table()703 MS_U8 SRAM3_IHC[MAX_SRAM_SIZE]; in Hal_PQ_set_sram_ihc_crd_table()704 MS_U8 SRAM4_IHC[MAX_SRAM_SIZE]; in Hal_PQ_set_sram_ihc_crd_table()[all …]
639 #define MAX_SRAM_SIZE 0x100 in Hal_PQ_set_sram_ihc_crd_table() macro654 MS_U8 SRAM1_IHC[MAX_SRAM_SIZE]; in Hal_PQ_set_sram_ihc_crd_table()655 MS_U8 SRAM2_IHC[MAX_SRAM_SIZE]; in Hal_PQ_set_sram_ihc_crd_table()656 MS_U8 SRAM3_IHC[MAX_SRAM_SIZE]; in Hal_PQ_set_sram_ihc_crd_table()657 MS_U8 SRAM4_IHC[MAX_SRAM_SIZE]; in Hal_PQ_set_sram_ihc_crd_table()697 #define MAX_SRAM_SIZE 0x100 in Hal_PQ_set_sram_ihc_crd_table()703 MS_U8 SRAM1_IHC[MAX_SRAM_SIZE]; in Hal_PQ_set_sram_ihc_crd_table()704 MS_U8 SRAM2_IHC[MAX_SRAM_SIZE]; in Hal_PQ_set_sram_ihc_crd_table()705 MS_U8 SRAM3_IHC[MAX_SRAM_SIZE]; in Hal_PQ_set_sram_ihc_crd_table()706 MS_U8 SRAM4_IHC[MAX_SRAM_SIZE]; in Hal_PQ_set_sram_ihc_crd_table()[all …]
948 #define MAX_SRAM_SIZE 0x100 in MDrv_XC_ACE_Set_IHC_SRAM() macro955 MS_U16 SRAM1_IHC[MAX_SRAM_SIZE]; in MDrv_XC_ACE_Set_IHC_SRAM()956 MS_U16 SRAM2_IHC[MAX_SRAM_SIZE]; in MDrv_XC_ACE_Set_IHC_SRAM()957 MS_U16 SRAM3_IHC[MAX_SRAM_SIZE]; in MDrv_XC_ACE_Set_IHC_SRAM()958 MS_U16 SRAM4_IHC[MAX_SRAM_SIZE]; in MDrv_XC_ACE_Set_IHC_SRAM()981 cont1 = cont1 < MAX_SRAM_SIZE-1 ? cont1+1 : MAX_SRAM_SIZE-1; in MDrv_XC_ACE_Set_IHC_SRAM()987 cont2 = cont2 < MAX_SRAM_SIZE-1 ? cont2+1 : MAX_SRAM_SIZE-1; in MDrv_XC_ACE_Set_IHC_SRAM()993 cont3 = cont3 < MAX_SRAM_SIZE-1 ? cont3+1 : MAX_SRAM_SIZE-1; in MDrv_XC_ACE_Set_IHC_SRAM()999 cont4 = cont4 < MAX_SRAM_SIZE-1 ? cont4+1 : MAX_SRAM_SIZE-1; in MDrv_XC_ACE_Set_IHC_SRAM()1013 cont1 = cont1 < MAX_SRAM_SIZE-1 ? cont1+1 : MAX_SRAM_SIZE-1; in MDrv_XC_ACE_Set_IHC_SRAM()[all …]
800 #define MAX_SRAM_SIZE 0x124 macro839 MS_U16 SRAM1_IHC[MAX_SRAM_SIZE]; in Hal_PQ_set_sram_ihc_crd_table()840 MS_U16 SRAM2_IHC[MAX_SRAM_SIZE]; in Hal_PQ_set_sram_ihc_crd_table()841 MS_U16 SRAM3_IHC[MAX_SRAM_SIZE]; in Hal_PQ_set_sram_ihc_crd_table()842 MS_U16 SRAM4_IHC[MAX_SRAM_SIZE]; in Hal_PQ_set_sram_ihc_crd_table()
684 #define MAX_SRAM_SIZE 0x124 macro723 MS_U16 SRAM1_IHC[MAX_SRAM_SIZE] = {0}; in Hal_PQ_set_sram_ihc_crd_table()724 MS_U16 SRAM2_IHC[MAX_SRAM_SIZE] = {0}; in Hal_PQ_set_sram_ihc_crd_table()725 MS_U16 SRAM3_IHC[MAX_SRAM_SIZE] = {0}; in Hal_PQ_set_sram_ihc_crd_table()726 MS_U16 SRAM4_IHC[MAX_SRAM_SIZE] = {0}; in Hal_PQ_set_sram_ihc_crd_table()
1119 #define MAX_SRAM_SIZE 0x124 macro1158 MS_U16 SRAM1_IHC[MAX_SRAM_SIZE]; in Hal_PQ_set_sram_ihc_crd_table()1159 MS_U16 SRAM2_IHC[MAX_SRAM_SIZE]; in Hal_PQ_set_sram_ihc_crd_table()1160 MS_U16 SRAM3_IHC[MAX_SRAM_SIZE]; in Hal_PQ_set_sram_ihc_crd_table()1161 MS_U16 SRAM4_IHC[MAX_SRAM_SIZE]; in Hal_PQ_set_sram_ihc_crd_table()