Searched refs:MAX_1P_MODE_CLK (Results 1 – 2 of 2) sorted by relevance
196 #define MAX_1P_MODE_CLK 320000000 //(300*1024*1024) // max 1p mode clk value macro10877 …ICE1)&&(((MS_U32)(u16Width)*(MS_U32)(u16Height)*(u32Vfreqx10/10)) >= MAX_1P_MODE_CLK))//ip clk >= … in _MDrv_SC_check_2p_mode()10925 …else if(u32InputCLK >= MAX_1P_MODE_CLK)//ip clk >= 300Mhz,will be setted 2p mode.op clk>= ip clk,w… in _MDrv_SC_check_2p_mode()10946 if ((u16Width*u16Height*60 >= MAX_1P_MODE_CLK)) // 60 => MAX opm frame rate in _MDrv_SC_check_2p_mode()
196 #define MAX_1P_MODE_CLK 320000000 //(300*1024*1024) // max 1p mode clk value10848 …ICE1)&&(((MS_U32)(u16Width)*(MS_U32)(u16Height)*(u32Vfreqx10/10)) >= MAX_1P_MODE_CLK))//ip clk >= …10896 …else if(u32InputCLK >= MAX_1P_MODE_CLK)//ip clk >= 300Mhz,will be setted 2p mode.op clk>= ip clk,w…10917 if ((u16Width*u16Height*60 >= MAX_1P_MODE_CLK)) // 60 => MAX opm frame rate