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Searched refs:BK_AFEC_CF (Results 1 – 25 of 27) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/vd/hal/mainz/avd/
H A DhalAVD.c3766 RIU_WriteRegBit(BK_AFEC_CF,ENABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
3776 RIU_WriteRegBit(BK_AFEC_CF,DISABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
3792 RIU_WriteRegBit(BK_AFEC_CF,DISABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
3922 RIU_WriteByteMask( BK_AFEC_CF, u8Mode << 0, BMASK(1:0) ); in HAL_AVD_AFEC_SetVtotal()
4025 RIU_WriteRegBit(BK_AFEC_CF, bEnable, BIT(2)); in HAL_AVD_AFEC_EnableCVBSLPF()
H A DregAVD.h356 #define BK_AFEC_CF (AFEC_REG_BASE+0xCF) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/mustang/avd/
H A DhalAVD.c7128 RIU_WriteRegBit(BK_AFEC_CF,ENABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7138 RIU_WriteRegBit(BK_AFEC_CF,DISABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7154 RIU_WriteRegBit(BK_AFEC_CF,DISABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7284 RIU_WriteByteMask( BK_AFEC_CF, u8Mode << 0, BMASK(1:0) ); in HAL_AVD_AFEC_SetVtotal()
7387 RIU_WriteRegBit(BK_AFEC_CF, bEnable, BIT(2)); in HAL_AVD_AFEC_EnableCVBSLPF()
H A DregAVD.h356 #define BK_AFEC_CF (AFEC_REG_BASE+0xCF) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/M7821/avd/
H A DhalAVD.c7254 RIU_WriteRegBit(BK_AFEC_CF,ENABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7264 RIU_WriteRegBit(BK_AFEC_CF,DISABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7280 RIU_WriteRegBit(BK_AFEC_CF,DISABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7410 RIU_WriteByteMask( BK_AFEC_CF, u8Mode << 0, BMASK(1:0) ); in HAL_AVD_AFEC_SetVtotal()
7513 RIU_WriteRegBit(BK_AFEC_CF, bEnable, BIT(2)); in HAL_AVD_AFEC_EnableCVBSLPF()
H A DregAVD.h356 #define BK_AFEC_CF (AFEC_REG_BASE+0xCF) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/kano/avd/
H A DhalAVD.c7254 RIU_WriteRegBit(BK_AFEC_CF,ENABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7264 RIU_WriteRegBit(BK_AFEC_CF,DISABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7280 RIU_WriteRegBit(BK_AFEC_CF,DISABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7410 RIU_WriteByteMask( BK_AFEC_CF, u8Mode << 0, BMASK(1:0) ); in HAL_AVD_AFEC_SetVtotal()
7513 RIU_WriteRegBit(BK_AFEC_CF, bEnable, BIT(2)); in HAL_AVD_AFEC_EnableCVBSLPF()
H A DregAVD.h356 #define BK_AFEC_CF (AFEC_REG_BASE+0xCF) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/manhattan/avd/
H A DhalAVD.c7201 RIU_WriteRegBit(BK_AFEC_CF,ENABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7211 RIU_WriteRegBit(BK_AFEC_CF,DISABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7227 RIU_WriteRegBit(BK_AFEC_CF,DISABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7357 RIU_WriteByteMask( BK_AFEC_CF, u8Mode << 0, BMASK(1:0) ); in HAL_AVD_AFEC_SetVtotal()
7460 RIU_WriteRegBit(BK_AFEC_CF, bEnable, BIT(2)); in HAL_AVD_AFEC_EnableCVBSLPF()
H A DregAVD.h356 #define BK_AFEC_CF (AFEC_REG_BASE+0xCF) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/M7621/avd/
H A DhalAVD.c7254 RIU_WriteRegBit(BK_AFEC_CF,ENABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7264 RIU_WriteRegBit(BK_AFEC_CF,DISABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7280 RIU_WriteRegBit(BK_AFEC_CF,DISABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7410 RIU_WriteByteMask( BK_AFEC_CF, u8Mode << 0, BMASK(1:0) ); in HAL_AVD_AFEC_SetVtotal()
7513 RIU_WriteRegBit(BK_AFEC_CF, bEnable, BIT(2)); in HAL_AVD_AFEC_EnableCVBSLPF()
H A DregAVD.h356 #define BK_AFEC_CF (AFEC_REG_BASE+0xCF) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/maldives/avd/
H A DhalAVD.c7128 RIU_WriteRegBit(BK_AFEC_CF,ENABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7138 RIU_WriteRegBit(BK_AFEC_CF,DISABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7154 RIU_WriteRegBit(BK_AFEC_CF,DISABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7284 RIU_WriteByteMask( BK_AFEC_CF, u8Mode << 0, BMASK(1:0) ); in HAL_AVD_AFEC_SetVtotal()
7387 RIU_WriteRegBit(BK_AFEC_CF, bEnable, BIT(2)); in HAL_AVD_AFEC_EnableCVBSLPF()
H A DregAVD.h356 #define BK_AFEC_CF (AFEC_REG_BASE+0xCF) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/messi/avd/
H A DhalAVD.c3766 RIU_WriteRegBit(BK_AFEC_CF,ENABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
3776 RIU_WriteRegBit(BK_AFEC_CF,DISABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
3792 RIU_WriteRegBit(BK_AFEC_CF,DISABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
3922 RIU_WriteByteMask( BK_AFEC_CF, u8Mode << 0, BMASK(1:0) ); in HAL_AVD_AFEC_SetVtotal()
4025 RIU_WriteRegBit(BK_AFEC_CF, bEnable, BIT(2)); in HAL_AVD_AFEC_EnableCVBSLPF()
H A DregAVD.h356 #define BK_AFEC_CF (AFEC_REG_BASE+0xCF) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/maserati/avd/
H A DhalAVD.c7254 RIU_WriteRegBit(BK_AFEC_CF,ENABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7264 RIU_WriteRegBit(BK_AFEC_CF,DISABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7280 RIU_WriteRegBit(BK_AFEC_CF,DISABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7410 RIU_WriteByteMask( BK_AFEC_CF, u8Mode << 0, BMASK(1:0) ); in HAL_AVD_AFEC_SetVtotal()
7513 RIU_WriteRegBit(BK_AFEC_CF, bEnable, BIT(2)); in HAL_AVD_AFEC_EnableCVBSLPF()
H A DregAVD.h356 #define BK_AFEC_CF (AFEC_REG_BASE+0xCF) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/maxim/avd/
H A DhalAVD.c7254 RIU_WriteRegBit(BK_AFEC_CF,ENABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7264 RIU_WriteRegBit(BK_AFEC_CF,DISABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7280 RIU_WriteRegBit(BK_AFEC_CF,DISABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7410 RIU_WriteByteMask( BK_AFEC_CF, u8Mode << 0, BMASK(1:0) ); in HAL_AVD_AFEC_SetVtotal()
7513 RIU_WriteRegBit(BK_AFEC_CF, bEnable, BIT(2)); in HAL_AVD_AFEC_EnableCVBSLPF()
H A DregAVD.h356 #define BK_AFEC_CF (AFEC_REG_BASE+0xCF) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/mooney/avd/
H A DhalAVD.c3765 RIU_WriteRegBit(BK_AFEC_CF,ENABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
3775 RIU_WriteRegBit(BK_AFEC_CF,DISABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
3791 RIU_WriteRegBit(BK_AFEC_CF,DISABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
3921 RIU_WriteByteMask( BK_AFEC_CF, u8Mode << 0, BMASK(1:0) ); in HAL_AVD_AFEC_SetVtotal()
4024 RIU_WriteRegBit(BK_AFEC_CF, bEnable, BIT(2)); in HAL_AVD_AFEC_EnableCVBSLPF()
H A DregAVD.h356 #define BK_AFEC_CF (AFEC_REG_BASE+0xCF) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/macan/avd/
H A DhalAVD.c7144 RIU_WriteRegBit(BK_AFEC_CF,ENABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7154 RIU_WriteRegBit(BK_AFEC_CF,DISABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7170 RIU_WriteRegBit(BK_AFEC_CF,DISABLE,BIT(7)); in HAL_AVD_AFEC_SetInput()
7300 RIU_WriteByteMask( BK_AFEC_CF, u8Mode << 0, BMASK(1:0) ); in HAL_AVD_AFEC_SetVtotal()
7403 RIU_WriteRegBit(BK_AFEC_CF, bEnable, BIT(2)); in HAL_AVD_AFEC_EnableCVBSLPF()
H A DregAVD.h356 #define BK_AFEC_CF (AFEC_REG_BASE+0xCF) macro
/utopia/UTPA2-700.0.x/modules/vd/drv/avd/
H A DAVD.c1627 RIU_WriteByte(BK_AFEC_CF, 0x80); in Drv_AVD_Init()
2958 u8tmp = HAL_AVD_GetReg(BK_AFEC_CF); in Drv_AVD_SetFactoryPara()
2960 HAL_AVD_SetReg(BK_AFEC_CF,u8tmp |(u8Value & BIT(2))); in Drv_AVD_SetFactoryPara()

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