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Searched refs:BK_AFEC_CE (Results 1 – 25 of 26) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/vd/hal/mainz/avd/
H A DhalAVD.c3590 RIU_WriteRegBit(BK_AFEC_CE, ENABLE, BIT(5)); in HAL_AVD_AFEC_SetPatchFlag()
3973 RIU_WriteRegBit( BK_AFEC_CE, bEnable, BIT(0)); in HAL_AVD_AFEC_EnableForceMode()
3991 RIU_WriteByteMask( BK_AFEC_CE, (u8FSCMode) << 1, BMASK(3:1) ); in HAL_AVD_AFEC_SetFSCMode()
H A DregAVD.h355 #define BK_AFEC_CE (AFEC_REG_BASE+0xCE) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/mustang/avd/
H A DhalAVD.c6946 RIU_WriteRegBit(BK_AFEC_CE, ENABLE, BIT(5)); in HAL_AVD_AFEC_SetPatchFlag()
7335 RIU_WriteRegBit( BK_AFEC_CE, bEnable, BIT(0)); in HAL_AVD_AFEC_EnableForceMode()
7353 RIU_WriteByteMask( BK_AFEC_CE, (u8FSCMode) << 1, BMASK(3:1) ); in HAL_AVD_AFEC_SetFSCMode()
H A DregAVD.h355 #define BK_AFEC_CE (AFEC_REG_BASE+0xCE) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/M7821/avd/
H A DhalAVD.c7072 RIU_WriteRegBit(BK_AFEC_CE, ENABLE, BIT(5)); in HAL_AVD_AFEC_SetPatchFlag()
7461 RIU_WriteRegBit( BK_AFEC_CE, bEnable, BIT(0)); in HAL_AVD_AFEC_EnableForceMode()
7479 RIU_WriteByteMask( BK_AFEC_CE, (u8FSCMode) << 1, BMASK(3:1) ); in HAL_AVD_AFEC_SetFSCMode()
H A DregAVD.h355 #define BK_AFEC_CE (AFEC_REG_BASE+0xCE) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/kano/avd/
H A DhalAVD.c7072 RIU_WriteRegBit(BK_AFEC_CE, ENABLE, BIT(5)); in HAL_AVD_AFEC_SetPatchFlag()
7461 RIU_WriteRegBit( BK_AFEC_CE, bEnable, BIT(0)); in HAL_AVD_AFEC_EnableForceMode()
7479 RIU_WriteByteMask( BK_AFEC_CE, (u8FSCMode) << 1, BMASK(3:1) ); in HAL_AVD_AFEC_SetFSCMode()
H A DregAVD.h355 #define BK_AFEC_CE (AFEC_REG_BASE+0xCE) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/manhattan/avd/
H A DhalAVD.c7019 RIU_WriteRegBit(BK_AFEC_CE, ENABLE, BIT(5)); in HAL_AVD_AFEC_SetPatchFlag()
7408 RIU_WriteRegBit( BK_AFEC_CE, bEnable, BIT(0)); in HAL_AVD_AFEC_EnableForceMode()
7426 RIU_WriteByteMask( BK_AFEC_CE, (u8FSCMode) << 1, BMASK(3:1) ); in HAL_AVD_AFEC_SetFSCMode()
H A DregAVD.h355 #define BK_AFEC_CE (AFEC_REG_BASE+0xCE) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/M7621/avd/
H A DhalAVD.c7072 RIU_WriteRegBit(BK_AFEC_CE, ENABLE, BIT(5)); in HAL_AVD_AFEC_SetPatchFlag()
7461 RIU_WriteRegBit( BK_AFEC_CE, bEnable, BIT(0)); in HAL_AVD_AFEC_EnableForceMode()
7479 RIU_WriteByteMask( BK_AFEC_CE, (u8FSCMode) << 1, BMASK(3:1) ); in HAL_AVD_AFEC_SetFSCMode()
H A DregAVD.h355 #define BK_AFEC_CE (AFEC_REG_BASE+0xCE) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/maldives/avd/
H A DhalAVD.c6946 RIU_WriteRegBit(BK_AFEC_CE, ENABLE, BIT(5)); in HAL_AVD_AFEC_SetPatchFlag()
7335 RIU_WriteRegBit( BK_AFEC_CE, bEnable, BIT(0)); in HAL_AVD_AFEC_EnableForceMode()
7353 RIU_WriteByteMask( BK_AFEC_CE, (u8FSCMode) << 1, BMASK(3:1) ); in HAL_AVD_AFEC_SetFSCMode()
H A DregAVD.h355 #define BK_AFEC_CE (AFEC_REG_BASE+0xCE) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/messi/avd/
H A DhalAVD.c3590 RIU_WriteRegBit(BK_AFEC_CE, ENABLE, BIT(5)); in HAL_AVD_AFEC_SetPatchFlag()
3973 RIU_WriteRegBit( BK_AFEC_CE, bEnable, BIT(0)); in HAL_AVD_AFEC_EnableForceMode()
3991 RIU_WriteByteMask( BK_AFEC_CE, (u8FSCMode) << 1, BMASK(3:1) ); in HAL_AVD_AFEC_SetFSCMode()
H A DregAVD.h355 #define BK_AFEC_CE (AFEC_REG_BASE+0xCE) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/maserati/avd/
H A DhalAVD.c7072 RIU_WriteRegBit(BK_AFEC_CE, ENABLE, BIT(5)); in HAL_AVD_AFEC_SetPatchFlag()
7461 RIU_WriteRegBit( BK_AFEC_CE, bEnable, BIT(0)); in HAL_AVD_AFEC_EnableForceMode()
7479 RIU_WriteByteMask( BK_AFEC_CE, (u8FSCMode) << 1, BMASK(3:1) ); in HAL_AVD_AFEC_SetFSCMode()
H A DregAVD.h355 #define BK_AFEC_CE (AFEC_REG_BASE+0xCE) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/maxim/avd/
H A DhalAVD.c7072 RIU_WriteRegBit(BK_AFEC_CE, ENABLE, BIT(5)); in HAL_AVD_AFEC_SetPatchFlag()
7461 RIU_WriteRegBit( BK_AFEC_CE, bEnable, BIT(0)); in HAL_AVD_AFEC_EnableForceMode()
7479 RIU_WriteByteMask( BK_AFEC_CE, (u8FSCMode) << 1, BMASK(3:1) ); in HAL_AVD_AFEC_SetFSCMode()
H A DregAVD.h355 #define BK_AFEC_CE (AFEC_REG_BASE+0xCE) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/mooney/avd/
H A DhalAVD.c3589 RIU_WriteRegBit(BK_AFEC_CE, ENABLE, BIT(5)); in HAL_AVD_AFEC_SetPatchFlag()
3972 RIU_WriteRegBit( BK_AFEC_CE, bEnable, BIT(0)); in HAL_AVD_AFEC_EnableForceMode()
3990 RIU_WriteByteMask( BK_AFEC_CE, (u8FSCMode) << 1, BMASK(3:1) ); in HAL_AVD_AFEC_SetFSCMode()
H A DregAVD.h355 #define BK_AFEC_CE (AFEC_REG_BASE+0xCE) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/macan/avd/
H A DhalAVD.c6962 RIU_WriteRegBit(BK_AFEC_CE, ENABLE, BIT(5)); in HAL_AVD_AFEC_SetPatchFlag()
7351 RIU_WriteRegBit( BK_AFEC_CE, bEnable, BIT(0)); in HAL_AVD_AFEC_EnableForceMode()
7369 RIU_WriteByteMask( BK_AFEC_CE, (u8FSCMode) << 1, BMASK(3:1) ); in HAL_AVD_AFEC_SetFSCMode()
H A DregAVD.h355 #define BK_AFEC_CE (AFEC_REG_BASE+0xCE) macro
/utopia/UTPA2-700.0.x/modules/ve/drv/ve/include/
H A Dve_Analog_Reg.h691 #define BK_AFEC_CE (AFEC_REG_BASE+0xCE) macro

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