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Searched refs:BK_AFEC_9B (Results 1 – 25 of 26) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/vd/hal/mustang/avd/
H A DregAVD.h304 #define BK_AFEC_9B (AFEC_REG_BASE+0x9B) macro
H A DhalAVD.c7531 RIU_WriteByteMask (BK_AFEC_9B, eVDHsyncSensitivityTuning.u8CNTRSyncBeforeLock << 0, BMASK(5:0)); in HAL_AVD_AFEC_SetHsyncSensitivity()
/utopia/UTPA2-700.0.x/modules/vd/hal/kano/avd/
H A DregAVD.h304 #define BK_AFEC_9B (AFEC_REG_BASE+0x9B) macro
H A DhalAVD.c7657 RIU_WriteByteMask (BK_AFEC_9B, eVDHsyncSensitivityTuning.u8CNTRSyncBeforeLock << 0, BMASK(5:0)); in HAL_AVD_AFEC_SetHsyncSensitivity()
/utopia/UTPA2-700.0.x/modules/vd/hal/maxim/avd/
H A DregAVD.h304 #define BK_AFEC_9B (AFEC_REG_BASE+0x9B) macro
H A DhalAVD.c7657 RIU_WriteByteMask (BK_AFEC_9B, eVDHsyncSensitivityTuning.u8CNTRSyncBeforeLock << 0, BMASK(5:0)); in HAL_AVD_AFEC_SetHsyncSensitivity()
/utopia/UTPA2-700.0.x/modules/vd/hal/macan/avd/
H A DregAVD.h304 #define BK_AFEC_9B (AFEC_REG_BASE+0x9B) macro
H A DhalAVD.c7547 RIU_WriteByteMask (BK_AFEC_9B, eVDHsyncSensitivityTuning.u8CNTRSyncBeforeLock << 0, BMASK(5:0)); in HAL_AVD_AFEC_SetHsyncSensitivity()
/utopia/UTPA2-700.0.x/modules/vd/hal/messi/avd/
H A DregAVD.h304 #define BK_AFEC_9B (AFEC_REG_BASE+0x9B) macro
H A DhalAVD.c4169 RIU_WriteByteMask (BK_AFEC_9B, eVDHsyncSensitivityTuning.u8CNTRSyncBeforeLock << 0, BMASK(5:0)); in HAL_AVD_AFEC_SetHsyncSensitivity()
/utopia/UTPA2-700.0.x/modules/vd/hal/manhattan/avd/
H A DregAVD.h304 #define BK_AFEC_9B (AFEC_REG_BASE+0x9B) macro
H A DhalAVD.c7604 RIU_WriteByteMask (BK_AFEC_9B, eVDHsyncSensitivityTuning.u8CNTRSyncBeforeLock << 0, BMASK(5:0)); in HAL_AVD_AFEC_SetHsyncSensitivity()
/utopia/UTPA2-700.0.x/modules/vd/hal/maserati/avd/
H A DregAVD.h304 #define BK_AFEC_9B (AFEC_REG_BASE+0x9B) macro
H A DhalAVD.c7657 RIU_WriteByteMask (BK_AFEC_9B, eVDHsyncSensitivityTuning.u8CNTRSyncBeforeLock << 0, BMASK(5:0)); in HAL_AVD_AFEC_SetHsyncSensitivity()
/utopia/UTPA2-700.0.x/modules/vd/hal/M7621/avd/
H A DregAVD.h304 #define BK_AFEC_9B (AFEC_REG_BASE+0x9B) macro
H A DhalAVD.c7657 RIU_WriteByteMask (BK_AFEC_9B, eVDHsyncSensitivityTuning.u8CNTRSyncBeforeLock << 0, BMASK(5:0)); in HAL_AVD_AFEC_SetHsyncSensitivity()
/utopia/UTPA2-700.0.x/modules/vd/hal/mainz/avd/
H A DregAVD.h304 #define BK_AFEC_9B (AFEC_REG_BASE+0x9B) macro
H A DhalAVD.c4169 RIU_WriteByteMask (BK_AFEC_9B, eVDHsyncSensitivityTuning.u8CNTRSyncBeforeLock << 0, BMASK(5:0)); in HAL_AVD_AFEC_SetHsyncSensitivity()
/utopia/UTPA2-700.0.x/modules/vd/hal/maldives/avd/
H A DregAVD.h304 #define BK_AFEC_9B (AFEC_REG_BASE+0x9B) macro
H A DhalAVD.c7531 RIU_WriteByteMask (BK_AFEC_9B, eVDHsyncSensitivityTuning.u8CNTRSyncBeforeLock << 0, BMASK(5:0)); in HAL_AVD_AFEC_SetHsyncSensitivity()
/utopia/UTPA2-700.0.x/modules/vd/hal/M7821/avd/
H A DregAVD.h304 #define BK_AFEC_9B (AFEC_REG_BASE+0x9B) macro
H A DhalAVD.c7657 RIU_WriteByteMask (BK_AFEC_9B, eVDHsyncSensitivityTuning.u8CNTRSyncBeforeLock << 0, BMASK(5:0)); in HAL_AVD_AFEC_SetHsyncSensitivity()
/utopia/UTPA2-700.0.x/modules/vd/hal/mooney/avd/
H A DregAVD.h304 #define BK_AFEC_9B (AFEC_REG_BASE+0x9B) macro
H A DhalAVD.c4168 RIU_WriteByteMask (BK_AFEC_9B, eVDHsyncSensitivityTuning.u8CNTRSyncBeforeLock << 0, BMASK(5:0)); in HAL_AVD_AFEC_SetHsyncSensitivity()
/utopia/UTPA2-700.0.x/modules/ve/drv/ve/include/
H A Dve_Analog_Reg.h640 #define BK_AFEC_9B (AFEC_REG_BASE+0x9B) macro

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