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Searched refs:BK_AFEC_39 (Results 1 – 25 of 26) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/vd/hal/mainz/avd/
H A DhalAVD.c4044 RIU_WriteByteMask(BK_AFEC_39, 0x03, BIT(1) | BIT(0)); // more reliability in HAL_AVD_AFEC_EnableBottomAverage()
4048 RIU_WriteByteMask(BK_AFEC_39, 0x00, BIT(1) | BIT(0)); // more sensitivity in HAL_AVD_AFEC_EnableBottomAverage()
H A DregAVD.h206 #define BK_AFEC_39 (AFEC_REG_BASE+0x39) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/mustang/avd/
H A DhalAVD.c7406 RIU_WriteByteMask(BK_AFEC_39, 0x03, BIT(1) | BIT(0)); // more reliability in HAL_AVD_AFEC_EnableBottomAverage()
7410 RIU_WriteByteMask(BK_AFEC_39, 0x00, BIT(1) | BIT(0)); // more sensitivity in HAL_AVD_AFEC_EnableBottomAverage()
H A DregAVD.h206 #define BK_AFEC_39 (AFEC_REG_BASE+0x39) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/M7821/avd/
H A DhalAVD.c7532 RIU_WriteByteMask(BK_AFEC_39, 0x03, BIT(1) | BIT(0)); // more reliability in HAL_AVD_AFEC_EnableBottomAverage()
7536 RIU_WriteByteMask(BK_AFEC_39, 0x00, BIT(1) | BIT(0)); // more sensitivity in HAL_AVD_AFEC_EnableBottomAverage()
H A DregAVD.h206 #define BK_AFEC_39 (AFEC_REG_BASE+0x39) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/kano/avd/
H A DhalAVD.c7532 RIU_WriteByteMask(BK_AFEC_39, 0x03, BIT(1) | BIT(0)); // more reliability in HAL_AVD_AFEC_EnableBottomAverage()
7536 RIU_WriteByteMask(BK_AFEC_39, 0x00, BIT(1) | BIT(0)); // more sensitivity in HAL_AVD_AFEC_EnableBottomAverage()
H A DregAVD.h206 #define BK_AFEC_39 (AFEC_REG_BASE+0x39) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/manhattan/avd/
H A DhalAVD.c7479 RIU_WriteByteMask(BK_AFEC_39, 0x03, BIT(1) | BIT(0)); // more reliability in HAL_AVD_AFEC_EnableBottomAverage()
7483 RIU_WriteByteMask(BK_AFEC_39, 0x00, BIT(1) | BIT(0)); // more sensitivity in HAL_AVD_AFEC_EnableBottomAverage()
H A DregAVD.h206 #define BK_AFEC_39 (AFEC_REG_BASE+0x39) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/M7621/avd/
H A DhalAVD.c7532 RIU_WriteByteMask(BK_AFEC_39, 0x03, BIT(1) | BIT(0)); // more reliability in HAL_AVD_AFEC_EnableBottomAverage()
7536 RIU_WriteByteMask(BK_AFEC_39, 0x00, BIT(1) | BIT(0)); // more sensitivity in HAL_AVD_AFEC_EnableBottomAverage()
H A DregAVD.h206 #define BK_AFEC_39 (AFEC_REG_BASE+0x39) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/maldives/avd/
H A DhalAVD.c7406 RIU_WriteByteMask(BK_AFEC_39, 0x03, BIT(1) | BIT(0)); // more reliability in HAL_AVD_AFEC_EnableBottomAverage()
7410 RIU_WriteByteMask(BK_AFEC_39, 0x00, BIT(1) | BIT(0)); // more sensitivity in HAL_AVD_AFEC_EnableBottomAverage()
H A DregAVD.h206 #define BK_AFEC_39 (AFEC_REG_BASE+0x39) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/messi/avd/
H A DhalAVD.c4044 RIU_WriteByteMask(BK_AFEC_39, 0x03, BIT(1) | BIT(0)); // more reliability in HAL_AVD_AFEC_EnableBottomAverage()
4048 RIU_WriteByteMask(BK_AFEC_39, 0x00, BIT(1) | BIT(0)); // more sensitivity in HAL_AVD_AFEC_EnableBottomAverage()
H A DregAVD.h206 #define BK_AFEC_39 (AFEC_REG_BASE+0x39) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/maserati/avd/
H A DhalAVD.c7532 RIU_WriteByteMask(BK_AFEC_39, 0x03, BIT(1) | BIT(0)); // more reliability in HAL_AVD_AFEC_EnableBottomAverage()
7536 RIU_WriteByteMask(BK_AFEC_39, 0x00, BIT(1) | BIT(0)); // more sensitivity in HAL_AVD_AFEC_EnableBottomAverage()
H A DregAVD.h206 #define BK_AFEC_39 (AFEC_REG_BASE+0x39) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/maxim/avd/
H A DhalAVD.c7532 RIU_WriteByteMask(BK_AFEC_39, 0x03, BIT(1) | BIT(0)); // more reliability in HAL_AVD_AFEC_EnableBottomAverage()
7536 RIU_WriteByteMask(BK_AFEC_39, 0x00, BIT(1) | BIT(0)); // more sensitivity in HAL_AVD_AFEC_EnableBottomAverage()
H A DregAVD.h206 #define BK_AFEC_39 (AFEC_REG_BASE+0x39) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/mooney/avd/
H A DhalAVD.c4043 RIU_WriteByteMask(BK_AFEC_39, 0x03, BIT(1) | BIT(0)); // more reliability in HAL_AVD_AFEC_EnableBottomAverage()
4047 RIU_WriteByteMask(BK_AFEC_39, 0x00, BIT(1) | BIT(0)); // more sensitivity in HAL_AVD_AFEC_EnableBottomAverage()
H A DregAVD.h206 #define BK_AFEC_39 (AFEC_REG_BASE+0x39) macro
/utopia/UTPA2-700.0.x/modules/vd/hal/macan/avd/
H A DhalAVD.c7422 RIU_WriteByteMask(BK_AFEC_39, 0x03, BIT(1) | BIT(0)); // more reliability in HAL_AVD_AFEC_EnableBottomAverage()
7426 RIU_WriteByteMask(BK_AFEC_39, 0x00, BIT(1) | BIT(0)); // more sensitivity in HAL_AVD_AFEC_EnableBottomAverage()
H A DregAVD.h206 #define BK_AFEC_39 (AFEC_REG_BASE+0x39) macro
/utopia/UTPA2-700.0.x/modules/ve/drv/ve/include/
H A Dve_Analog_Reg.h542 #define BK_AFEC_39 (AFEC_REG_BASE+0x39) macro

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