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Searched refs:reg25 (Results 1 – 8 of 8) sorted by relevance

/rockchip-linux_mpp/mpp/hal/vpu/jpegd/
H A Dhal_jpegd_vdpu1.c134 reg->reg25.sw_dc2_code1_cnt = dc_ptr1->bits[0]; in jpegd_write_code_word_number()
135 reg->reg25.sw_dc2_code2_cnt = dc_ptr1->bits[1]; in jpegd_write_code_word_number()
136 reg->reg25.sw_dc2_code3_cnt = dc_ptr1->bits[2]; in jpegd_write_code_word_number()
137 reg->reg25.sw_dc2_code4_cnt = dc_ptr1->bits[3]; in jpegd_write_code_word_number()
138 reg->reg25.sw_dc2_code5_cnt = dc_ptr1->bits[4]; in jpegd_write_code_word_number()
139 reg->reg25.sw_dc2_code6_cnt = dc_ptr1->bits[5]; in jpegd_write_code_word_number()
140 reg->reg25.sw_dc2_code7_cnt = dc_ptr1->bits[6]; in jpegd_write_code_word_number()
141 reg->reg25.sw_dc2_code8_cnt = dc_ptr1->bits[7]; in jpegd_write_code_word_number()
H A Dhal_jpegd_vdpu1_reg.h495 } reg25; member
H A Dhal_jpegd_vdpu2_reg.h115 RK_U32 reg25; member
/rockchip-linux_mpp/mpp/vproc/vdpp/
H A Dvdpp_reg.h159 } reg25; // 0x0064 member
H A Dvdpp_common.h388 } reg25; /* 0x0064 */ member
732 } reg25; /* 0x0264 */ member
1076 } reg25; /* 0x0464 */ member
1420 } reg25; /* 0x0664 */ member
H A Dvdpp2_reg.h187 } reg25; // 0x0064 member
538 } reg25; // 0x0264 member
H A Dvdpp.c93 dst_reg->common.reg25.sw_vdpp_src_addr_uv = src_params->src.cbcr; in vdpp_params_to_reg()
H A Dvdpp2.c689 dst_reg->sharp.reg25.sw_peaking1_idx_p0 = peaking_ctrl_idx_P0[1]; in set_shp_to_vdpp2_reg()
690 dst_reg->sharp.reg25.sw_peaking1_idx_p1 = peaking_ctrl_idx_P1[1]; in set_shp_to_vdpp2_reg()
1155 dst_reg->common.reg25.sw_vdpp_src_addr_uv = src_params->src.cbcr; in vdpp2_params_to_reg()