Searched refs:reg136 (Results 1 – 8 of 8) sorted by relevance
99 regs->reg136.sw_alt_scan_flag_e = pp->alternate_vertical_scan_flag; in vdpu2_mpg4d_setup_regs_by_syntax()103 regs->reg136.sw_rounding = pp->vop_rounding_type; in vdpu2_mpg4d_setup_regs_by_syntax()140 regs->reg136.sw_rounding = 0; in vdpu2_mpg4d_setup_regs_by_syntax()161 regs->reg136.sw_hrz_bit_of_fwd_mv = pp->vop_fcode_forward; in vdpu2_mpg4d_setup_regs_by_syntax()162 regs->reg136.sw_vrz_bit_of_fwd_mv = pp->vop_fcode_forward; in vdpu2_mpg4d_setup_regs_by_syntax()163 regs->reg136.sw_hrz_bit_of_bwd_mv = pp->vop_fcode_backward; in vdpu2_mpg4d_setup_regs_by_syntax()164 regs->reg136.sw_vrz_bit_of_bwd_mv = pp->vop_fcode_backward; in vdpu2_mpg4d_setup_regs_by_syntax()185 regs->reg136.sw_hrz_bit_of_fwd_mv = pp->vop_fcode_forward; in vdpu2_mpg4d_setup_regs_by_syntax()186 regs->reg136.sw_vrz_bit_of_fwd_mv = pp->vop_fcode_forward; in vdpu2_mpg4d_setup_regs_by_syntax()202 regs->reg136.sw_hrz_bit_of_fwd_mv = 1; in vdpu2_mpg4d_setup_regs_by_syntax()[all …]
305 } reg136; member
68 regs->reg136.sw_rounding = 0; in vpu2_h263d_setup_regs_by_syntax()118 regs->reg136.sw_hrz_bit_of_fwd_mv = 1; in vpu2_h263d_setup_regs_by_syntax()119 regs->reg136.sw_vrz_bit_of_fwd_mv = 1; in vpu2_h263d_setup_regs_by_syntax()120 regs->reg136.sw_prev_pic_type = (pp->prev_coding_type == H263_P_VOP); in vpu2_h263d_setup_regs_by_syntax()
947 dst_reg->sharp.reg136.sw_lum_gain0 = p_shp_param->global_gain_lum_val[0]; in set_shp_to_vdpp2_reg()948 dst_reg->sharp.reg136.sw_lum_gain1 = p_shp_param->global_gain_lum_val[1]; in set_shp_to_vdpp2_reg()949 dst_reg->sharp.reg136.sw_lum_gain2 = p_shp_param->global_gain_lum_val[2]; in set_shp_to_vdpp2_reg()950 dst_reg->sharp.reg136.sw_lum_gain3 = p_shp_param->global_gain_lum_val[3]; in set_shp_to_vdpp2_reg()952 …gain_slp_temp[0] = ROUND(128 * (float)(dst_reg->sharp.reg136.sw_lum_gain1 - dst_reg->sharp.reg136… in set_shp_to_vdpp2_reg()954 …gain_slp_temp[1] = ROUND(128 * (float)(dst_reg->sharp.reg136.sw_lum_gain2 - dst_reg->sharp.reg136… in set_shp_to_vdpp2_reg()956 …gain_slp_temp[2] = ROUND(128 * (float)(dst_reg->sharp.reg136.sw_lum_gain3 - dst_reg->sharp.reg136… in set_shp_to_vdpp2_reg()958 …[3] = ROUND(128 * (float)(dst_reg->sharp.reg137.sw_lum_gain4 - dst_reg->sharp.reg136.sw_lum_gain3) in set_shp_to_vdpp2_reg()
1092 } reg136; // 0x0420 member
102 reg->reg136.sw_ac1_code11_cnt = ac_ptr0->bits[10]; in jpegd_write_code_word_number()103 reg->reg136.sw_ac1_code12_cnt = ac_ptr0->bits[11]; in jpegd_write_code_word_number()104 reg->reg136.sw_ac1_code13_cnt = ac_ptr0->bits[12]; in jpegd_write_code_word_number()105 reg->reg136.sw_ac1_code14_cnt = ac_ptr0->bits[13]; in jpegd_write_code_word_number()
506 } reg136; member