Searched refs:sw2 (Results 1 – 8 of 8) sorted by relevance
| /rk3399_rockchip-uboot/board/freescale/corenet_ds/ |
| H A D | eth_hydra.c | 291 u8 sw2 = in_8(&PIXIS_SW(2)); in initialize_lane_to_slot() local 293 lane_to_slot[2] = (sw2 & PIXIS_SW2_LANE_23_SEL) ? 7 : 4; in initialize_lane_to_slot() 296 lane_to_slot[4] = (sw2 & PIXIS_SW2_LANE_45_SEL) ? 7 : 6; in initialize_lane_to_slot() 299 switch (sw2 & PIXIS_SW2_LANE_67_SEL_MASK) { in initialize_lane_to_slot() 312 lane_to_slot[8] = (sw2 & PIXIS_SW2_LANE_8_SEL) ? 3 : 0; in initialize_lane_to_slot() 314 lane_to_slot[16] = (sw2 & PIXIS_SW2_LANE_1617_SEL) ? 1 : 0; in initialize_lane_to_slot()
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| H A D | eth_superhydra.c | 253 u8 sw2 = in_8(&PIXIS_SW(2)); in initialize_lane_to_slot() local 257 lane_to_slot[2] = (sw2 & PIXIS_SW2_LANE_23_SEL) ? 7 : 4; in initialize_lane_to_slot() 260 lane_to_slot[4] = (sw2 & PIXIS_SW2_LANE_45_SEL) ? 7 : 6; in initialize_lane_to_slot() 263 switch (sw2 & PIXIS_SW2_LANE_67_SEL_MASK) { in initialize_lane_to_slot() 276 lane_to_slot[8] = (sw2 & PIXIS_SW2_LANE_8_SEL) ? 3 : 0; in initialize_lane_to_slot() 279 lane_to_slot[16] = (sw2 & PIXIS_SW2_LANE_1617_SEL) ? 1 : 0; in initialize_lane_to_slot()
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| /rk3399_rockchip-uboot/drivers/power/regulator/ |
| H A D | pfuze100.c | 164 PFUZE100_SW_REG(sw2, PFUZE100_SW2VOL, 25000), 182 PFUZE100_SW_REG(sw2, PFUZE100_SW2VOL, 25000), 200 PFUZE100_SWB_REG(sw2, PFUZE100_SW2VOL, 0x7, 50000, pfuze3000_sw2lo),
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| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | sun8i-h3-orangepi-2.dts | 87 sw2 { 88 label = "sw2";
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| H A D | imx7d-sdb.dts | 196 sw2_reg: sw2 {
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| H A D | imx6qdl-logicpd.dtsi | 76 sw2_reg: sw2 {
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| H A D | imx6sl-evk.dts | 169 sw2_reg: sw2 {
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| H A D | imx6sll-evk.dts | 190 sw2_reg: sw2 {
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