Searched refs:rx_ctl (Results 1 – 2 of 2) sorted by relevance
36 u32 rx_ctl; /* 0x3c */ member291 writel(EMAC_RX_SETUP, ®s->rx_ctl); in emac_setup()352 setbits_le32(®s->rx_ctl, 0x8); in _sunxi_emac_eth_init()436 setbits_le32(®s->rx_ctl, 0x1 << 3); in _sunxi_emac_eth_recv()437 while (readl(®s->rx_ctl) & (0x1 << 3)) in _sunxi_emac_eth_recv()
366 u16 rx_ctl; in asix_basic_reset() local394 rx_ctl = asix_read_rx_ctl(dev); in asix_basic_reset()395 debug("RX_CTL is 0x%04x after software reset\n", rx_ctl); in asix_basic_reset()399 rx_ctl = asix_read_rx_ctl(dev); in asix_basic_reset()400 debug("RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl); in asix_basic_reset()