| /rk3399_rockchip-uboot/board/toradex/apalis_imx6/ |
| H A D | pf0100.c | 33 unsigned programmed = 0; in pmic_init() local 116 programmed++; in pmic_init() 120 return programmed; in pmic_init() 123 programmed++; in pmic_init() 127 return programmed; in pmic_init() 130 programmed++; in pmic_init() 132 switch (programmed) { in pmic_init() 145 if (programmed != 3) { in pmic_init() 151 return programmed; in pmic_init() 161 return programmed; in pmic_init()
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| /rk3399_rockchip-uboot/board/toradex/colibri_imx6/ |
| H A D | pf0100.c | 33 unsigned programmed = 0; in pmic_init() local 116 programmed++; in pmic_init() 120 return programmed; in pmic_init() 123 programmed++; in pmic_init() 127 return programmed; in pmic_init() 130 programmed++; in pmic_init() 132 switch (programmed) { in pmic_init() 144 return programmed; in pmic_init()
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| /rk3399_rockchip-uboot/doc/ |
| H A D | README.fuse | 6 A fuse corresponds to a single non-volatile memory bit that can be programmed 8 fuse that has not been programmed reads 0. 45 Only the bits to be programmed should be set in the input value (i.e. for 46 fuse bits that have already been programmed and hence should be left 61 fuses have already been programmed or are locked (if the SoC allows to
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| H A D | README.fsl-hwconfig | 10 routed to the Wolfson WM8776 codec. The ngPIXIS can be programmed to 13 will be programmed accordingly. Second, the clock-frequency property
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| H A D | README.spear | 6 The SPEAr SoC family embeds a customizable logic that can be programmed 73 environment variables. Although, we can check the mac id programmed in i2c
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| H A D | README.mpc74xx | 14 we also don't do. The BATs are programmed just for the benefit of
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| H A D | README.nand-boot-ppc440 | 53 This image should be programmed at offset 0 in the NAND flash:
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| H A D | README.mxc_hab | 9 In addition, the U-Boot image to be programmed into the
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| H A D | README.enetaddr | 47 Previous behavior had the MAC address always being programmed into hardware
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| /rk3399_rockchip-uboot/board/microchip/pic32mzda/ |
| H A D | README | 12 boot-flash. Stage1 bootloader inturns locates and jumps to U-Boot programmed
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| /rk3399_rockchip-uboot/board/birdland/bav335x/ |
| H A D | README | 13 If the BAV335x EEPROM is populated and programmed, the board will
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| /rk3399_rockchip-uboot/board/gateworks/gw_ventana/ |
| H A D | README | 9 information from an EEPROM on the board programmed at the factory and supports 47 settings programmed at the factory. 68 The Gateworks Ventana boards with NAND flash have been factory programmed 83 header must be programmed in the NAND flash boot device at an offset hard 85 The image can be programmed from either U-Boot or Linux: 110 When the IMX6 eFUSE settings have been factory programmed to boot from
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| /rk3399_rockchip-uboot/drivers/pwm/ |
| H A D | Kconfig | 19 programmed. Channel 4 (the last) is normally used as a timer.
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| /rk3399_rockchip-uboot/board/sunxi/ |
| H A D | README.nand | 21 SPL image that is ready to be programmed directly embedding the ECCs,
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| /rk3399_rockchip-uboot/arch/arm/cpu/armv8/fsl-layerscape/doc/ |
| H A D | README.lsch3 | 296 Assumption: MC firmware, DPL and DPC dtb is already programmed 310 Assumption: MC firmware, DPL and DPC dtb is already programmed 329 programmed on NOR flash.
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| /rk3399_rockchip-uboot/board/freescale/mpc8569mds/ |
| H A D | README | 71 http://opensource.freescale.com/firmware/, and it must be programmed to
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| /rk3399_rockchip-uboot/arch/arm/mach-tegra/ |
| H A D | Kconfig | 139 flash-programmed over a USB connection. On dev boards, this is
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| /rk3399_rockchip-uboot/arch/arm/mach-mvebu/ |
| H A D | Kconfig | 196 This enables a "dry run" mode where eFuses are not really programmed.
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| /rk3399_rockchip-uboot/board/cadence/xtfpga/ |
| H A D | README | 73 has been programmed into the first two 64 KB sectors of the Flash.
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| /rk3399_rockchip-uboot/board/davinci/da8xxevm/ |
| H A D | README.da850 | 23 programmed for it. We do not take advantage of this and instead use SPL as
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| /rk3399_rockchip-uboot/board/Barix/ipam390/ |
| H A D | README.ipam390 | 28 programmed for it. We do not take advantage of this and instead use SPL as
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| /rk3399_rockchip-uboot/board/sbc8548/ |
| H A D | README | 259 [*] fb80 represents the default programmed by WR JTAG register files,
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/pinctrl/ |
| H A D | pinctrl-bindings.txt | 231 sleep-hardware-state - indicate this is sleep related state which will be programmed
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| /rk3399_rockchip-uboot/ |
| H A D | README | 4218 will be programmed into hardware as part of the initialization process. This 4679 U-Boot or FPGA images) which usually will be programmed to 5051 programmed for SDRAM access. Using the temporary configuration, a
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