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Searched refs:RK3588_PCIE3PHY_GRF_CMN_CON0 (Results 1 – 2 of 2) sorted by relevance

/rk3399_rockchip-uboot/drivers/phy/
H A Dphy-rockchip-snps-pcie3.c29 #define RK3588_PCIE3PHY_GRF_CMN_CON0 0x0 macro
126 regmap_write(priv->phy_grf, RK3588_PCIE3PHY_GRF_CMN_CON0, in rockchip_p3phy_rk3588_init()
133 regmap_write(priv->phy_grf, RK3588_PCIE3PHY_GRF_CMN_CON0, in rockchip_p3phy_rk3588_init()
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/
H A Dspl_pcie_ep_boot.c402 #define RK3588_PCIE3PHY_GRF_CMN_CON0 (PCIE3PHY_GRF_BASE + 0x0000) macro
445 writel((0x7 << 16) | PHY_MODE_PCIE, RK3588_PCIE3PHY_GRF_CMN_CON0); in pcie_cru_init()
446 printep("PHY Mode 0x%x\n", readl(RK3588_PCIE3PHY_GRF_CMN_CON0) & 7); in pcie_cru_init()
484 writel((0x1 << 8) | (0x1 << 24), RK3588_PCIE3PHY_GRF_CMN_CON0); in pcie_cru_init()