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/rk3399_rockchip-uboot/scripts/
H A Dobjdiff97 SRC="`git rev-parse --short HEAD^`"
100 SRC="`git rev-parse --short $1`"
110 SRCD="$TMPD/$SRC"
/rk3399_rockchip-uboot/board/hisilicon/hikey/
H A DREADME168 INFO: hisi_mcu_load_image: [SRC 0x1000200] 0x7600 0x201 0x1eae1 0x1ea71
174 INFO: hisi_mcu_load_image: [SRC 0x1000400] 0xbf00bf00 0x4815b672 0x48154780 0x60014915
180 INFO: hisi_mcu_load_image: [SRC 0x10070b4] 0x55 0x0 0x0 0x0
186 INFO: hisi_mcu_load_image: [SRC 0x10074b4] 0x55 0x0 0x0 0x0
192 INFO: hisi_mcu_load_image: [SRC 0x100a654] 0x4ff0e92d 0x2cc5f645 0x2600b0ab 0x2c7cf6c0
198 INFO: hisi_mcu_load_image: [SRC 0x101ea34] 0x33323130 0x37363534 0x42413938 0x46454443
204 INFO: hisi_mcu_load_image: [SRC 0x1021c44] 0x0 0x0 0x0 0x0
210 INFO: hisi_mcu_load_image: [SRC 0x1022838] 0xf80000a0 0x0 0xf80000ac 0x0
/rk3399_rockchip-uboot/arch/arm/cpu/armv8/fsl-layerscape/doc/
H A DREADME.lsch3165 3) Block Copy: SRC=0x0107, SRC_ADDR=0x00020000, DEST_ADDR=0x1800a000,
170 SRC should match the cfg_rcw_src, the reset config pins. It depends
195 3) Block Copy: SRC=0x0119, SRC_ADDR=0x00080000, DEST_ADDR=0x1800a000,
201 Notice the difference from QDS is SRC, SRC_ADDR and the offset of u-boot image
/rk3399_rockchip-uboot/scripts/kconfig/
H A Dzconf.tab.c_shipped435 /* Copy COUNT objects from SRC to DST. The source and destination do
/rk3399_rockchip-uboot/scripts/dtc/
H A Ddtc-parser.tab.c_shipped422 /* Copy COUNT objects from SRC to DST. The source and destination do