Searched refs:wr_to_miss (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/plat/intel/soc/agilex5/soc/ |
| H A D | agilex5_memory_controller.c | 177 rd_to_miss, wr_to_miss, burst_len, burst_len_ddr_clk, in configure_ddr_sched_ctrl_regs() local
260 wr_to_miss = ((rd_latency + burst_len_ddr_clk + 2 + tw_rin_clk_cycles) in configure_ddr_sched_ctrl_regs()
268 wr_to_miss << DDRTIMING_WRTOMISS_OFST | in configure_ddr_sched_ctrl_regs()
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| /rk3399_ARM-atf/plat/intel/soc/agilex/soc/ |
| H A D | agilex_memory_controller.c | 176 rd_to_miss, wr_to_miss, burst_len, burst_len_ddr_clk, in configure_ddr_sched_ctrl_regs() local
259 wr_to_miss = ((rd_latency + burst_len_ddr_clk + 2 + tw_rin_clk_cycles) in configure_ddr_sched_ctrl_regs()
267 wr_to_miss << DDRTIMING_WRTOMISS_OFST | in configure_ddr_sched_ctrl_regs()
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| /rk3399_ARM-atf/plat/intel/soc/stratix10/soc/ |
| H A D | s10_memory_controller.c | 205 rd_to_miss, wr_to_miss, burst_len, burst_len_ddr_clk, in configure_ddr_sched_ctrl_regs() local
288 wr_to_miss = ((rd_latency + burst_len_ddr_clk + 2 + tw_rin_clk_cycles) in configure_ddr_sched_ctrl_regs()
296 wr_to_miss << DDRTIMING_WRTOMISS_OFST | in configure_ddr_sched_ctrl_regs()
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