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Searched refs:uib (Results 1 – 13 of 13) sorted by relevance

/rk3399_ARM-atf/drivers/st/ddr/phy/phyinit/src/
H A Dddrphy_phyinit_isdbytedisabled.c28 disabledbyte = (dbytenumber > (config->uib.numactivedbytedfi0 - 1U)) ? 1 : 0; in ddrphy_phyinit_isdbytedisabled()
30 nad0 = config->uib.numactivedbytedfi0; in ddrphy_phyinit_isdbytedisabled()
31 nad1 = config->uib.numactivedbytedfi1; in ddrphy_phyinit_isdbytedisabled()
33 if ((nad0 + nad1) > config->uib.numdbyte) { in ddrphy_phyinit_isdbytedisabled()
37 nad0, nad1, config->uib.numdbyte); in ddrphy_phyinit_isdbytedisabled()
40 if (config->uib.dfi1exists != 0U) { in ddrphy_phyinit_isdbytedisabled()
41 if (config->uib.numactivedbytedfi1 == 0U) { in ddrphy_phyinit_isdbytedisabled()
43 disabledbyte = (dbytenumber > (config->uib.numactivedbytedfi0 - 1U)) ? in ddrphy_phyinit_isdbytedisabled()
47 disabledbyte = (((config->uib.numactivedbytedfi0 - 1U) < dbytenumber) && in ddrphy_phyinit_isdbytedisabled()
48 (dbytenumber < (config->uib.numdbyte / 2U))) ? in ddrphy_phyinit_isdbytedisabled()
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H A Dddrphy_phyinit_calcmb.c42 uint32_t nad0 = config->uib.numactivedbytedfi0; in ddrphy_phyinit_calcmb()
50 nad1 = config->uib.numactivedbytedfi1; in ddrphy_phyinit_calcmb()
54 if ((nad0 == 0U) || (config->uib.numdbyte == 0U)) { in ddrphy_phyinit_calcmb()
61 if ((nad0 + nad1) > config->uib.numdbyte) { in ddrphy_phyinit_calcmb()
68 if ((config->uib.dfi1exists == 0U) && (nad1 != 0U)) { in ddrphy_phyinit_calcmb()
90 if (config->uib.dimmtype == DDR_DIMMTYPE_NODIMM) { in ddrphy_phyinit_calcmb()
97 if (config->uib.dimmtype == DDR_DIMMTYPE_NODIMM) { in ddrphy_phyinit_calcmb()
112 ret = ddrphy_phyinit_softsetmb(mb_ddr_1d, MB_FIELD_DRAMFREQ, config->uib.frequency * 2U); in ddrphy_phyinit_calcmb()
117 ret = ddrphy_phyinit_softsetmb(mb_ddr_1d, MB_FIELD_PLLBYPASSEN, config->uib.pllbypass); in ddrphy_phyinit_calcmb()
122 if (config->uib.dfifreqratio == 1U) { in ddrphy_phyinit_calcmb()
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H A Dddrphy_phyinit_progcsrskiptrain.c53 uifs = (1000 * 1000000) / ((int)config->uib.frequency * 2); in dfimrl_program()
72 for (byte = 0U; byte < config->uib.numdbyte; byte++) { in dfimrl_program()
115 uifs = (1000 * 1000000) / ((int)config->uib.frequency * 2);
138 for (byte = 0U; byte < config->uib.numdbyte; byte++) {
198 uifs = (1000 * 1000000) / ((int)config->uib.frequency * 2);
217 for (byte = 0U; byte < config->uib.numdbyte; byte++) {
281 uifs = (1000 * 1000000) / ((int)config->uib.frequency * 2);
293 rxendly_offset_x1000000 = config->uib.frequency < 333U ?
318 for (byte = 0U; byte < config->uib.numdbyte; byte++) {
526 hwtlpcsena = (uint16_t)config->uib.numrank_dfi0 | 0x1U;
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H A Dddrphy_phyinit_c_initphyconfig.c47 for (byte = 0U; byte < config->uib.numdbyte; byte++) { in txslewrate_program()
83 if (config->uib.numanib == 8U) { in atxslewrate_program()
88 for (anib = 0U; anib < config->uib.numanib; anib++) { in atxslewrate_program()
149 uint32_t halffreq = config->uib.frequency / 2U; in pllctrl2_program()
191 if (config->uib.frequency >= 933U) { in ardptrinitval_program()
198 if (config->uib.pllbypass == 1U) { in ardptrinitval_program()
330 } else if (config->uib.frequency <= 933U) { in procodttimectl_program()
333 } else if (config->uib.frequency <= 1200U) { in procodttimectl_program()
386 for (byte = 0U; byte < config->uib.numdbyte; byte++) { in txodtdrvstren_program()
436 for (byte = 0U; byte < config->uib.numdbyte; byte++) { in tximpedancectrl1_program()
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H A Dddrphy_phyinit_f_loaddmem.c36 if ((mb_ddr_1d->enableddqs > (8U * (uint8_t)config->uib.numactivedbytedfi0)) || in ddrphy_phyinit_f_loaddmem()
51 if ((mb_ddr_1d->enableddqscha > (uint8_t)(8U * config->uib.numactivedbytedfi0)) || in ddrphy_phyinit_f_loaddmem()
52 (mb_ddr_1d->enableddqschb > (uint8_t)(8U * config->uib.numactivedbytedfi1)) || in ddrphy_phyinit_f_loaddmem()
H A Dddrphy_phyinit_initstruct.c159 mb_ddr_1d->enableddqs = (uint8_t)((config->uib.numactivedbytedfi0 + in ddrphy_phyinit_initstruct()
160 config->uib.numactivedbytedfi1) * 8U); in ddrphy_phyinit_initstruct()
166 mb_ddr_1d->x16present = (config->uib.dramdatawidth == 0x10) ? in ddrphy_phyinit_initstruct()
195 mb_ddr_1d->enableddqscha = (uint8_t)(config->uib.numactivedbytedfi0 * 8U); in ddrphy_phyinit_initstruct()
196 mb_ddr_1d->cspresentcha = (config->uib.numrank_dfi0 == 2U) ? in ddrphy_phyinit_initstruct()
197 0x3U : (uint8_t)config->uib.numrank_dfi0; in ddrphy_phyinit_initstruct()
198 mb_ddr_1d->enableddqschb = (uint8_t)(config->uib.numactivedbytedfi1 * 8U); in ddrphy_phyinit_initstruct()
199 mb_ddr_1d->cspresentchb = (config->uib.numrank_dfi1 == 2U) ? in ddrphy_phyinit_initstruct()
200 0x3U : (uint8_t)config->uib.numrank_dfi1; in ddrphy_phyinit_initstruct()
H A Dddrphy_phyinit_i_loadpieimage.c61 dfifrq_x10 = (10U * (uint16_t)config->uib.frequency) / 2U; in seq0bdly_program()
66 if (config->uib.frequency < 400U) { in seq0bdly_program()
68 } else if (config->uib.frequency < 533U) { in seq0bdly_program()
129 (config->uib.frequency < 333U)) { in seq0bdisableflag_program()
168 if (config->uib.frequency >= 333U) { in ppttrainsetup_program()
232 for (byte = 0U; byte < config->uib.numdbyte; byte++) { in traininghwreg_program()
H A Dddrphy_phyinit_sequence.c32 if (config->uib.numpstates > 1U) { in ddrphy_phyinit_sequence()
/rk3399_ARM-atf/drivers/st/ddr/phy/phyinit/usercustom/
H A Dddrphy_phyinit_usercustom_saveretregs.c70 for (byte = 0U; byte < config->uib.numdbyte; byte++) { in ddrphy_phyinit_usercustom_saveretregs()
154 for (anib = 0U; anib < config->uib.numanib; anib++) { in ddrphy_phyinit_usercustom_saveretregs()
164 for (byte = 0U; byte < config->uib.numdbyte; byte++) { in ddrphy_phyinit_usercustom_saveretregs()
H A Dddrphy_phyinit_usercustom_custompretrain.c66 for (byte = 0U; byte < config->uib.numdbyte; byte++) { in ddrphy_phyinit_usercustom_custompretrain()
/rk3399_ARM-atf/include/drivers/st/
H A Dstm32mp2_ddr.h139 struct user_input_basic uib; member
/rk3399_ARM-atf/drivers/st/ddr/
H A Dstm32mp2_ram.c34 ret = fdt_read_uint32_array(fdt, node, "st,phy-basic", size, (uint32_t *)&config->uib); in ddr_dt_get_ui_param()
H A Dstm32mp2_ddr.c278 (uint32_t)config->uib.pllbypass); in ddr_sysconf_configuration()