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Searched refs:pll_type (Results 1 – 1 of 1) sorted by relevance

/rk3399_ARM-atf/plat/intel/soc/agilex5/soc/
H A Dagilex5_clock_manager.c126 static int pll_source_sync_wait(uint32_t pll_type, int retry_count) in pll_source_sync_wait() argument
131 if ((pll_type == CLKMGR_MAINPLL_TYPE) != 0) { in pll_source_sync_wait()
143 if (pll_type == CLKMGR_MAINPLL_TYPE) in pll_source_sync_wait()
151 ERROR("CLKMGR: %s: timeout with pll_type %d\n", __func__, pll_type); in pll_source_sync_wait()
158 static int pll_source_sync_config(uint32_t pll_type, uint32_t addr_offset, in pll_source_sync_config() argument
168 if ((pll_type == CLKMGR_MAINPLL_TYPE) != 0) { in pll_source_sync_config()
174 return pll_source_sync_wait(pll_type, retry_count); in pll_source_sync_config()
177 static int pll_source_sync_read(uint32_t pll_type, uint32_t addr_offset, in pll_source_sync_read() argument
186 if ((pll_type == CLKMGR_MAINPLL_TYPE) != 0) { in pll_source_sync_read()
194 if ((pll_source_sync_wait(pll_type, retry_count)) != 0) { in pll_source_sync_read()
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