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Searched refs:base_reg (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/drivers/apusys/mt8196/
H A Dapusys_power.c125 uint32_t base_reg; in apu_acc_init() local
128 base_reg = APUSYS_ACC + top_acc_base_arr[acc_idx]; in apu_acc_init()
130 apu_w_are(are_idx++, base_reg + APU_ARDCM_CTRL1, APU_ARDCM_CTRL1_VAL_0); in apu_acc_init()
131 apu_w_are(are_idx++, base_reg + APU_ARDCM_CTRL0, APU_ARDCM_CTRL0_VAL_0); in apu_acc_init()
132 apu_w_are(are_idx++, base_reg + APU_ARDCM_CTRL1, APU_ARDCM_CTRL1_VAL_1); in apu_acc_init()
133 apu_w_are(are_idx++, base_reg + APU_ARDCM_CTRL0, APU_ARDCM_CTRL0_VAL_1); in apu_acc_init()
135 apu_w_are(are_idx++, base_reg + APU_ACC_CONFG_CLR0, CGEN_SOC); in apu_acc_init()
136 apu_w_are(are_idx++, base_reg + APU_ACC_CONFG_SET0, HW_CTRL_EN); in apu_acc_init()
140 base_reg = APUSYS_ACC + eng_acc_base_arr[acc_idx]; in apu_acc_init()
142 apu_w_are(are_idx++, base_reg + APU_ARDCM_CTRL1, APU_ARDCM_CTRL1_VAL_0); in apu_acc_init()
[all …]
/rk3399_ARM-atf/plat/marvell/armada/a3k/common/
H A Ddram_win.c191 uint32_t base_reg, ctrl_reg, size_reg, enabled, target; in dram_win_map_build() local
204 base_reg = mmio_read_32(CPU_DEC_WIN_BASE_REG(win_id)); in dram_win_map_build()
207 win->base_addr = (base_reg & CPU_DEC_BR_BASE_MASK) >> in dram_win_map_build()
227 uint32_t base_reg, ctrl_reg, size_reg, remap_reg; in cpu_win_set() local
239 base_reg = (uint32_t)(win_cfg->base_addr / in cpu_win_set()
241 base_reg <<= CPU_DEC_BR_BASE_OFFS; in cpu_win_set()
242 base_reg &= CPU_DEC_BR_BASE_MASK; in cpu_win_set()
243 mmio_write_32(CPU_DEC_WIN_BASE_REG(win_id), base_reg); in cpu_win_set()
/rk3399_ARM-atf/plat/mediatek/drivers/disp/
H A Dmtk_disp_priv.h13 #define DISP_CFG_ENTRY(base_reg, mask) \ argument
14 { .base = (base_reg), .ns_mask = (mask)}