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Searched refs:addr_offset (Results 1 – 5 of 5) sorted by relevance

/rk3399_ARM-atf/plat/rockchip/common/drivers/parameter/
H A Dddr_parameter.c54 uint32_t i, addr_offset, size_offset; in ddr_region_usage_parse() local
71 addr_offset = REGION_ADDR_OFFSET; in ddr_region_usage_parse()
76 base = mmio_read_64(addr + addr_offset); in ddr_region_usage_parse()
85 addr_offset += REGION_DATA_PER_BYTES; in ddr_region_usage_parse()
/rk3399_ARM-atf/plat/mediatek/drivers/thermal/inc/
H A Dthermal_lvts.h29 + lvts_data->tc[tc_id].addr_offset)
104 uintptr_t addr_offset; member
/rk3399_ARM-atf/plat/intel/soc/agilex5/soc/
H A Dagilex5_clock_manager.c158 static int pll_source_sync_config(uint32_t pll_type, uint32_t addr_offset, in pll_source_sync_config() argument
164 addr = ((addr_offset | CLKMGR_MEM_ADDR_START) & CLKMGR_MEM_ADDR_MASK); in pll_source_sync_config()
177 static int pll_source_sync_read(uint32_t pll_type, uint32_t addr_offset, in pll_source_sync_read() argument
183 addr = ((addr_offset | CLKMGR_MEM_ADDR_START) & CLKMGR_MEM_ADDR_MASK); in pll_source_sync_read()
/rk3399_ARM-atf/plat/mediatek/drivers/thermal/mt8189/
H A Dsoc_temp_lvts.c627 .addr_offset = 0x0,
644 .addr_offset = 0x100,
661 .addr_offset = 0x200,
678 .addr_offset = 0x0,
695 .addr_offset = 0x100,
/rk3399_ARM-atf/plat/imx/imx8ulp/upower/
H A Dupower_defs.h397 uint32_t addr_offset : 16U; /* addr_offset to 0x28330000 */ member