Searched refs:TEGRA_SID_XUSB_DEV (Results 1 – 3 of 3) sorted by relevance
316 XUSB_PADCTL_DEV_AXI_STREAMID_PF_0, TEGRA_SID_XUSB_DEV); in plat_early_platform_setup()318 XUSB_PADCTL_DEV_AXI_STREAMID_PF_0) == TEGRA_SID_XUSB_DEV); in plat_early_platform_setup()
440 XUSB_PADCTL_DEV_AXI_STREAMID_PF_0, TEGRA_SID_XUSB_DEV); in tegra_soc_pwr_domain_on_finish()442 XUSB_PADCTL_DEV_AXI_STREAMID_PF_0) == TEGRA_SID_XUSB_DEV); in tegra_soc_pwr_domain_on_finish()
298 #define TEGRA_SID_XUSB_DEV U(0x1c) macro