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Searched refs:SYSSGRF_SOC_CON (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/plat/rockchip/rk3576/drivers/secure/
H A Dsecure.c34 mmio_write_32(SYS_SGRF_BASE + SYSSGRF_SOC_CON(0), BITS_WITH_WMASK(0, 0x1, 4)); in secure_init()
35 mmio_write_32(SYS_SGRF_BASE + SYSSGRF_SOC_CON(0), BITS_WITH_WMASK(0, 0x1, 5)); in secure_init()
38 mmio_write_32(SYS_SGRF_BASE + SYSSGRF_SOC_CON(1), BITS_WITH_WMASK(1, 0x1, 14)); in secure_init()
H A Dsecure.h24 #define SYSSGRF_SOC_CON(i) (0x20 + (i) * 4) macro
/rk3399_ARM-atf/plat/rockchip/rk3576/drivers/soc/
H A Dsoc.c95 mmio_write_32(SYS_SGRF_BASE + SYSSGRF_SOC_CON(0), 0x20002000); in system_reset_init()
/rk3399_ARM-atf/plat/rockchip/rk3576/drivers/pmu/
H A Dpmu.c298 mmio_write_32(SYS_SGRF_BASE + SYSSGRF_SOC_CON(19), 0x00070000); in ddr_resume()
302 mmio_write_32(SYS_SGRF_BASE + SYSSGRF_SOC_CON(19), 0x00070000 | key_upd_msk); in ddr_resume()
312 mmio_write_32(SYS_SGRF_BASE + SYSSGRF_SOC_CON(19), 0x00700070); in ddr_resume()
695 mmio_write_32(SYS_SGRF_BASE + SYSSGRF_SOC_CON(19), in pmu_sleep_config()
835 mmio_read_32(SYS_SGRF_BASE + SYSSGRF_SOC_CON(0)); in secure_watchdog_disable()
838 mmio_write_32(SYS_SGRF_BASE + SYSSGRF_SOC_CON(0), in secure_watchdog_disable()
844 mmio_write_32(SYS_SGRF_BASE + SYSSGRF_SOC_CON(0), in secure_watchdog_restore()