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Searched refs:STIMER0_CHN_BASE (Results 1 – 5 of 5) sorted by relevance

/rk3399_ARM-atf/plat/rockchip/rk3568/drivers/soc/
H A Dsoc.c39 mmio_write_32(STIMER0_CHN_BASE(1) + TIMER_CONTROL_REG, TIMER_DIS); in secure_timer_init()
40 mmio_write_32(STIMER0_CHN_BASE(1) + TIMER_LOAD_COUNT0, 0xffffffff); in secure_timer_init()
41 mmio_write_32(STIMER0_CHN_BASE(1) + TIMER_LOAD_COUNT1, 0xffffffff); in secure_timer_init()
44 mmio_write_32(STIMER0_CHN_BASE(1) + TIMER_CONTROL_REG, TIMER_EN); in secure_timer_init()
H A Dsoc.h39 #define STIMER0_CHN_BASE(n) (STIME_BASE + 0x20 * (n)) macro
/rk3399_ARM-atf/plat/rockchip/rk3399/drivers/secure/
H A Dsecure.h66 #define STIMER0_CHN_BASE(n) (STIME_BASE + 0x20 * (n)) macro
/rk3399_ARM-atf/plat/rockchip/rk3588/drivers/soc/
H A Dsoc.h140 #define STIMER0_CHN_BASE(n) (STIMER0_BASE + 0x20 * (n)) macro
/rk3399_ARM-atf/plat/rockchip/rk3576/
H A Drk3576_def.h140 #define STIMER0_CHN_BASE(i) (STIMER0_BASE + 0x1000 * (i)) macro