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Searched refs:SOCFPGA_SYSMGR_SDMMC_CMD_QUEUE_SETTING_REG (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/plat/intel/soc/stratix10/include/
H A Ds10_system_manager.h72 #define SOCFPGA_SYSMGR_SDMMC_CMD_QUEUE_SETTING_REG 0x138 macro
/rk3399_ARM-atf/plat/intel/soc/agilex/include/
H A Dagilex_system_manager.h72 #define SOCFPGA_SYSMGR_SDMMC_CMD_QUEUE_SETTING_REG 0x138 macro
/rk3399_ARM-atf/plat/intel/soc/n5x/include/
H A Dn5x_system_manager.h72 #define SOCFPGA_SYSMGR_SDMMC_CMD_QUEUE_SETTING_REG 0x138 macro
/rk3399_ARM-atf/plat/intel/soc/agilex5/include/
H A Dagilex5_system_manager.h73 #define SOCFPGA_SYSMGR_SDMMC_CMD_QUEUE_SETTING_REG 0x138 macro