Home
last modified time | relevance | path

Searched refs:RCC_DDRPHYCCFGR (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/drivers/st/ddr/
H A Dstm32mp2_ddr_helpers.c290 mmio_setbits_32(rcc_base + RCC_DDRPHYCCFGR, RCC_DDRPHYCCFGR_DDRPHYCEN); in sr_ssr_entry()
304 mmio_setbits_32(rcc_base + RCC_DDRPHYCCFGR, RCC_DDRPHYCCFGR_DDRPHYCEN); in sr_ssr_exit()
516 mmio_clrbits_32(rcc_base + RCC_DDRPHYCCFGR, RCC_DDRPHYCCFGR_DDRPHYCEN); in ddr_sub_system_clk_off()
H A Dstm32mp2_ddr.c254 mmio_setbits_32(priv->rcc + RCC_DDRPHYCCFGR, RCC_DDRPHYCCFGR_DDRPHYCEN); in ddr_standby_reset()
280 mmio_write_32(priv->rcc + RCC_DDRPHYCCFGR, RCC_DDRPHYCCFGR_DDRPHYCEN); in ddr_sysconf_configuration()
/rk3399_ARM-atf/include/drivers/st/
H A Dstm32mp21_rcc.h304 #define RCC_DDRPHYCCFGR U(0x4E0) macro
H A Dstm32mp25_rcc.h308 #define RCC_DDRPHYCCFGR U(0x4E0) macro