Searched refs:PVTPLL_CCI_BASE (Results 1 – 2 of 2) sorted by relevance
67 #define PVTPLL_CCI_BASE 0x27250000 macro
771 mmio_write_32(PVTPLL_CCI_BASE + RK3576_PVTPLL_GCK_LEN, in clk_cci_set_rate()777 mmio_write_32(PVTPLL_CCI_BASE + RK3576_PVTPLL_GCK_CAL_CNT, 0x18); in clk_cci_set_rate()779 pvtpll_en = mmio_read_32(PVTPLL_CCI_BASE + RK3576_PVTPLL_GCK_CFG); in clk_cci_set_rate()781 mmio_write_32(PVTPLL_CCI_BASE + RK3576_PVTPLL_GCK_CFG, 0x00220022); in clk_cci_set_rate()783 mmio_write_32(PVTPLL_CCI_BASE + RK3576_PVTPLL_GCK_CFG, 0x00230023); in clk_cci_set_rate()