Home
last modified time | relevance | path

Searched refs:PMU_PWR_CON (Results 1 – 2 of 2) sorted by relevance

/rk3399_ARM-atf/plat/rockchip/rk3568/drivers/pmu/
H A Dpmu.c183 mmio_write_32(PMU_BASE + PMU_PWR_CON, WRITE_MASK_CLR(BIT(PWRDN_BYPASS))); in pmu_pd_powerdown_config()
184 mmio_write_32(PMU_BASE + PMU_PWR_CON, WRITE_MASK_CLR(BIT(BUS_BYPASS))); in pmu_pd_powerdown_config()
195 PMU_PWR_CON, mmio_read_32(PMU_BASE + PMU_PWR_CON)); in pmu_pd_powerdown_config()
210 mmio_write_32(PMU_BASE + PMU_PWR_CON, WRITE_MASK_CLR(BIT(DDR_BYPASS))); in pmu_ddr_suspend_config()
248 mmio_write_32(PMU_BASE + PMU_PWR_CON, WRITE_MASK_CLR(BIT(DSU_BYPASS))); in pmu_dsu_suspend_config()
256 PMU_PWR_CON, mmio_read_32(PMU_BASE + PMU_PWR_CON)); in pmu_dsu_suspend_config()
270 mmio_write_32(PMU_BASE + PMU_PWR_CON, (0xf << (16 + CPU0_BYPASS)) | cpus_bypass); in pmu_cpu_powerdown_config()
273 PMU_PWR_CON, mmio_read_32(PMU_BASE + PMU_PWR_CON)); in pmu_cpu_powerdown_config()
336 mmio_write_32(PMU_BASE + PMU_PWR_CON, CPUS_BYPASS); in pmu_suspend_cru_fsm()
351 mmio_write_32(PMU_BASE + PMU_PWR_CON, 0x00010001); in pmu_suspend_cru_fsm()
[all …]
H A Dpmu.h11 #define PMU_PWR_CON 0x0004 macro