Searched refs:PMU2_PWR_GATE_ST (Results 1 – 6 of 6) sorted by relevance
283 mmio_read_32(PMU_BASE + PMU2_PWR_GATE_ST) & BIT(pmu_pd_vop) ? 0x3 : 0x7; in ddr_resume()424 return mmio_read_32(PMU_BASE + PMU2_PWR_GATE_ST) & BIT(pd) ? in pmu_power_domain_st()445 mmio_read_32(PMU_BASE + PMU2_PWR_GATE_ST)); in pmu_power_domain_ctr()541 ddr_data.pmu_pd_st = mmio_read_32(PMU_BASE + PMU2_PWR_GATE_ST); in pmu_power_domains_suspend()618 uint32_t pmu_pd_st = mmio_read_32(PMU_BASE + PMU2_PWR_GATE_ST); in pmu_sleep_config()
181 uint32_t pmu_pd_st = mmio_read_32(PMU_BASE + PMU2_PWR_GATE_ST); in qos_save()263 uint32_t pmu_pd_st = mmio_read_32(PMU_BASE + PMU2_PWR_GATE_ST); in qos_restore()
92 #define PMU2_PWR_GATE_ST (PMU2_OFFSET + 0x0230) macro
220 uint32_t pmu_pd_st0 = mmio_read_32(PMU_BASE + PMU2_PWR_GATE_ST(0)); in qos_save()340 uint32_t pmu_pd_st0 = mmio_read_32(PMU_BASE + PMU2_PWR_GATE_ST(0)); in qos_restore()
88 #define PMU2_PWR_GATE_ST(i) (0x8180 + (i) * 4) macro
314 return mmio_read_32(PMU_BASE + PMU2_PWR_GATE_ST(pd / 32)) & BIT(pd % 32) ? in pmu_power_domain_st()492 mmio_read_32(PMU_BASE + PMU2_PWR_GATE_ST(0)), in pmu_power_domain_ctr()596 ddr_data.pmu_pd_st0 = mmio_read_32(PMU_BASE + PMU2_PWR_GATE_ST(0)); in pmu_power_domains_suspend()