Searched refs:PMU0_GRF_BASE (Results 1 – 3 of 3) sorted by relevance
66 if (mmio_read_32(PMU0_GRF_BASE + PMU0GRF_OS_REG(17)) == WARM_BOOT_MAGIC) { in print_glb_reset_status()71 mmio_write_32(PMU0_GRF_BASE + PMU0GRF_OS_REG(17), WARM_BOOT_MAGIC); in print_glb_reset_status()
602 mmio_write_32(PMU0_GRF_BASE + PMU0GRF_SOC_CON(1), in sleep_pin_config()604 mmio_write_32(PMU0_GRF_BASE + PMU0GRF_SOC_CON(0), in sleep_pin_config()633 mmio_read_32(PMU0_GRF_BASE + PMU0GRF_SOC_CON(5)); in pmu_sleep_config()781 mmio_write_32(PMU0_GRF_BASE + PMU0GRF_SOC_CON(5), 0x00400040); in pmu_sleep_config()784 mmio_write_32(PMU0_GRF_BASE + PMU0GRF_SOC_CON(5), in pmu_sleep_config()828 mmio_write_32(PMU0_GRF_BASE + PMU0GRF_SOC_CON(5), in pmu_sleep_restore()855 mmio_read_32(PMU0_GRF_BASE + PMU0GRF_SOC_CON(0)); in soc_sleep_config()857 mmio_read_32(PMU0_GRF_BASE + PMU0GRF_SOC_CON(1)); in soc_sleep_config()885 mmio_write_32(PMU0_GRF_BASE + PMU0GRF_SOC_CON(1), in soc_sleep_restore()887 mmio_write_32(PMU0_GRF_BASE + PMU0GRF_SOC_CON(0), in soc_sleep_restore()[all …]
47 #define PMU0_GRF_BASE 0x26024000 macro