Home
last modified time | relevance | path

Searched refs:PMC_PPLL3_CTRL0_REG (Results 1 – 2 of 2) sorted by relevance

/rk3399_ARM-atf/plat/hisilicon/hikey960/
H A Dhikey960_bl_common.c32 mmio_write_32(PMC_PPLL3_CTRL0_REG, 0x4904305); in hikey960_enable_ppll3()
/rk3399_ARM-atf/plat/hisilicon/hikey960/include/
H A Dhi3660.h148 #define PMC_PPLL3_CTRL0_REG (PMC_REG_BASE + 0x048) macro