Searched refs:PLL_CFG_P (Results 1 – 1 of 1) sorted by relevance
47 PLL_CFG_P, enumerator1227 value |= (out->output[PLL_CFG_P] << RCC_PLLNCFGR2_DIVP_SHIFT) & RCC_PLLNCFGR2_DIVP_MASK; in clk_stm32_pll_compute_cfgr2()1398 pll1->output.output[PLL_CFG_P] = divp; in clk_compute_pll1_settings()