Home
last modified time | relevance | path

Searched refs:IGRPEN1_EL1_ENABLE_G0_BIT (Results 1 – 2 of 2) sorted by relevance

/rk3399_ARM-atf/include/drivers/arm/
H A Dgicv3.h292 #define IGRPEN1_EL1_ENABLE_G0_BIT BIT_32(IGRPEN1_EL1_ENABLE_G0_SHIFT) macro
/rk3399_ARM-atf/drivers/arm/gic/v3/
H A Dgicv3_main.c329 write_icc_igrpen0_el1(IGRPEN1_EL1_ENABLE_G0_BIT); in gicv3_cpuif_enable()
361 ~IGRPEN1_EL1_ENABLE_G0_BIT); in gicv3_cpuif_disable()