Searched refs:HPIPE_PWR_CTR_DTL_FLOOP_EN_OFFSET (Results 1 – 3 of 3) sorted by relevance
136 #define HPIPE_PWR_CTR_DTL_FLOOP_EN_OFFSET 2 macro138 (0x1 << HPIPE_PWR_CTR_DTL_FLOOP_EN_OFFSET)
512 #define HPIPE_PWR_CTR_DTL_FLOOP_EN_OFFSET 2 macro514 (0x1 << HPIPE_PWR_CTR_DTL_FLOOP_EN_OFFSET)
505 data |= 0x1 << HPIPE_PWR_CTR_DTL_FLOOP_EN_OFFSET; in mvebu_cp110_comphy_sata_power_on()785 data = 0x0 << HPIPE_PWR_CTR_DTL_FLOOP_EN_OFFSET; in mvebu_cp110_comphy_sgmii_power_on()978 data = 0x1 << HPIPE_PWR_CTR_DTL_FLOOP_EN_OFFSET; in mvebu_cp110_comphy_xfi_power_on()1564 data = 0x0 << HPIPE_PWR_CTR_DTL_FLOOP_EN_OFFSET; in mvebu_cp110_comphy_pcie_power_on()1845 0x0 << HPIPE_PWR_CTR_DTL_FLOOP_EN_OFFSET, in mvebu_cp110_comphy_rxaui_power_on()