Searched refs:HPIPE_CLK_SRC_LO_PLL_RDY_DL_OFFSET (Results 1 – 3 of 3) sorted by relevance
449 #define HPIPE_CLK_SRC_LO_PLL_RDY_DL_OFFSET 5 macro451 (0x7 << HPIPE_CLK_SRC_LO_PLL_RDY_DL_OFFSET)
887 #define HPIPE_CLK_SRC_LO_PLL_RDY_DL_OFFSET 5 macro889 (0x7 << HPIPE_CLK_SRC_LO_PLL_RDY_DL_OFFSET)
1398 data = 0x2 << HPIPE_CLK_SRC_LO_PLL_RDY_DL_OFFSET; in mvebu_cp110_comphy_pcie_power_on()2003 0x2 << HPIPE_CLK_SRC_LO_PLL_RDY_DL_OFFSET, in mvebu_cp110_comphy_usb3_power_on()