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Searched refs:DVFSRC_SW_BW_8 (Results 1 – 3 of 3) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/
H A Dmt_spm_vcorefs_reg.h80 #define DVFSRC_SW_BW_8 (DVFSRC_BASE + 0x1FC) macro
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/
H A Dmt_vcore_dvfsrc_plat.c271 mmio_write_32(DVFSRC_SW_BW_8, 0x3FF); in spm_vcorefs_plat_init()
H A Dmt_spm_vcorefs_reg.h98 #define DVFSRC_SW_BW_8 (DVFSRC_BASE + 0x1FC) macro