Home
last modified time | relevance | path

Searched refs:DVFSRC_RECORD_0_L_1 (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/
H A Dmt_spm_vcorefs.h102 #define DVFSRC_RECORD_0_L_1 (DVFSRC_BASE + 0xBF4) macro
/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/spm/
H A Dmt_spm_vcorefs.h272 #define DVFSRC_RECORD_0_L_1 (DVFSRC_BASE + 0xBF4) macro
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/
H A Dmt_spm_vcorefs.h286 #define DVFSRC_RECORD_0_L_1 (DVFSRC_BASE + 0xBF4) macro
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/
H A Dmt_spm_vcorefs_reg.h265 #define DVFSRC_RECORD_0_L_1 (DVFSRC_BASE + 0x4BC) macro