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Searched refs:DVFSRC_BASIC_CONTROL (Results 1 – 10 of 10) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/
H A Dmt_vcore_dvfsrc_plat_def.h71 { DVFSRC_BASIC_CONTROL, 0x24E6222B },
72 { DVFSRC_BASIC_CONTROL, 0x24E602AB },
107 { DVFSRC_BASIC_CONTROL, 0x2456222B },
108 { DVFSRC_BASIC_CONTROL, 0x245602AB },
H A Dmt_spm_vcorefs_reg.h14 #define DVFSRC_BASIC_CONTROL (DVFSRC_BASE + 0x0) macro
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/
H A Dmt_vcore_dvfsrc_plat.c171 mmio_write_32(DVFSRC_BASIC_CONTROL, 0xD460213B); in dvfsrc_init()
172 mmio_write_32(DVFSRC_BASIC_CONTROL, 0xD46001BB); in dvfsrc_init()
174 mmio_write_32(DVFSRC_BASIC_CONTROL, 0xD560213B); in dvfsrc_init()
175 mmio_write_32(DVFSRC_BASIC_CONTROL, 0xD56001BB); in dvfsrc_init()
H A Dmt_spm_vcorefs_reg.h19 #define DVFSRC_BASIC_CONTROL (DVFSRC_BASE + 0x0) macro
/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/spm/
H A Dmt_spm_vcorefs.c311 {DVFSRC_BASIC_CONTROL, 0x0180004B},
312 {DVFSRC_BASIC_CONTROL, 0X0180404B},
313 {DVFSRC_BASIC_CONTROL, 0X0180014B},
H A Dmt_spm_vcorefs.h61 #define DVFSRC_BASIC_CONTROL (DVFSRC_BASE + 0x0) macro
/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/
H A Dmt_spm_vcorefs.c90 { DVFSRC_BASIC_CONTROL, 0x0298444B },
91 { DVFSRC_BASIC_CONTROL, 0x0298054B },
H A Dmt_spm_vcorefs.h50 #define DVFSRC_BASIC_CONTROL (DVFSRC_BASE + 0x0) macro
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/
H A Dmt_spm_vcorefs.c75 { DVFSRC_BASIC_CONTROL, 0x6698444B },
76 { DVFSRC_BASIC_CONTROL, 0x6698054B },
H A Dmt_spm_vcorefs.h72 #define DVFSRC_BASIC_CONTROL (DVFSRC_BASE + 0x0) macro