Searched refs:DENALI_CTL (Results 1 – 3 of 3) sorted by relevance
56 #define TI_LPDDR4__START__REG DENALI_CTL[0]59 #define TI_LPDDR4__INT_STATUS_MASTER__REG DENALI_CTL[334]60 #define TI_LPDDR4__INT_STATUS_TIMEOUT__REG DENALI_CTL[336]61 #define TI_LPDDR4__INT_STATUS_LOWPOWER__REG DENALI_CTL[337]62 #define TI_LPDDR4__INT_STATUS_TRAINING__REG DENALI_CTL[339]63 #define TI_LPDDR4__INT_STATUS_USERIF__REG DENALI_CTL[340]64 #define TI_LPDDR4__INT_STATUS_BIST__REG DENALI_CTL[341]65 #define TI_LPDDR4__INT_STATUS_MISC__REG DENALI_CTL[341]66 #define TI_LPDDR4__INT_STATUS_DFI__REG DENALI_CTL[342]67 #define TI_LPDDR4__INT_STATUS_FREQ__REG DENALI_CTL[342][all …]
17 volatile uint32_t DENALI_CTL[423]; member
67 ctlregbase->DENALI_CTL[342]); in lpddr4_pollandackirq()80 ctlregbase->DENALI_CTL[342]); in lpddr4_pollandackirq()171 *regvalue = ctlregbase->DENALI_CTL[regoffset]; in ti_lpddr4_readreg()210 ctlregbase->DENALI_CTL[regoffset] = regvalue; in ti_lpddr4_writereg()