Searched refs:DDRPHY_BASE_CH (Results 1 – 2 of 2) sorted by relevance
82 configs->low_power[ch].pcl_pd = mmio_read_32(DDRPHY_BASE_CH(0) + LP_CON0) & PCL_PD; in exit_low_power()83 mmio_clrbits_32(DDRPHY_BASE_CH(ch) + LP_CON0, PCL_PD); in exit_low_power()128 (mmio_read_32(DDRPHY_BASE_CH(ch) + DFI_LP_CON0) >> 31) & 0x1; in exit_low_power()135 mmio_setbits_32(DDRPHY_BASE_CH(ch) + DFI_LP_CON0, DFI_LP_MODE_APB); in resume_low_power()169 mmio_setbits_32(DDRPHY_BASE_CH(ch) + LP_CON0, PCL_PD); in resume_low_power()
146 #define DDRPHY_BASE_CH(n) (DDRPHY0_BASE + ((n) * 0x10000)) macro