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Searched refs:DDRC_DFISTAT (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/plat/imx/imx8m/ddr/
H A Ddram_retention.c84 while (mmio_read_32(DDRC_DFISTAT(0)) & 0x1) { in dram_enter_retention()
90 while (!(mmio_read_32(DDRC_DFISTAT(0)) & 0x1)) { in dram_enter_retention()
192 while (!(mmio_read_32(DDRC_DFISTAT(0)) & 0x1)) { in dram_exit_retention()
H A Dlpddr4_dvfs.c97 val = mmio_read_32(DDRC_DFISTAT(0)); // dfi_lp_ack in lpddr4_swffc()
196 val = mmio_read_32(DDRC_DFISTAT(0)); in lpddr4_swffc()
207 val = mmio_read_32(DDRC_DFISTAT(0)); in lpddr4_swffc()
H A Dddr4_dvfs.c130 while (mmio_read_32(DDRC_DFISTAT(0)) & 0x1) { in sw_pstate()
140 while (!(mmio_read_32(DDRC_DFISTAT(0)) & 0x1)) { in sw_pstate()
/rk3399_ARM-atf/plat/imx/imx8m/include/
H A Dddrc.h102 #define DDRC_DFISTAT(X) (DDRC_IPS_BASE_ADDR(X) + 0x1bc) macro