Searched refs:CLK_CONTROL_PERE_BASE (Results 1 – 1 of 1) sorted by relevance
34 #define CLK_CONTROL_PERE_BASE 0xC08F0000UL // SYSSS_PERE_Region_0 base Address macro40 #define CLK_CONTROL_CLKPEREPKCPROT0 (CLK_CONTROL_PERE_BASE + 0x00001370UL)72 case CLK_CONTROL_PERE_BASE: in rd_write_clock_control_register()