Searched refs:BIGCORE1GRF_BASE (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/plat/rockchip/rk3588/drivers/pmu/ |
| H A D | pm_pd_regs.c | 186 REG_REGION(0x20, 0x20, 4, BIGCORE1GRF_BASE, WMSK_VAL),
187 REG_REGION(0x28, 0x28, 4, BIGCORE1GRF_BASE, WMSK_VAL),
503 mmio_write_32(BIGCORE1GRF_BASE + 0x30, BITS_WITH_WMASK(1, 0x1, 5)); in pd_dsu_core_restore()
508 mmio_write_32(BIGCORE1GRF_BASE + 0x30, BITS_WITH_WMASK(0, 0x1, 5)); in pd_dsu_core_restore()
|
| /rk3399_ARM-atf/plat/rockchip/rk3588/ |
| H A D | rk3588_def.h | 35 #define BIGCORE1GRF_BASE 0xfd592000 macro
|
| /rk3399_ARM-atf/plat/rockchip/rk3588/drivers/scmi/ |
| H A D | rk3588_clk.c | 656 mmio_write_32(BIGCORE1GRF_BASE + RK3588_CPUB_PVTPLL_CON2, in clk_cpub23_set_rate()
659 mmio_write_32(BIGCORE1GRF_BASE + RK3588_CPUB_PVTPLL_CON0_L, in clk_cpub23_set_rate()
662 mmio_write_32(BIGCORE1GRF_BASE + RK3588_CPUB_PVTPLL_CON0_H, in clk_cpub23_set_rate()
665 mmio_write_32(BIGCORE1GRF_BASE + RK3588_CPUB_PVTPLL_CON1, in clk_cpub23_set_rate()
668 mmio_write_32(BIGCORE1GRF_BASE + RK3588_CPUB_PVTPLL_CON0_L, in clk_cpub23_set_rate()
671 mmio_write_32(BIGCORE1GRF_BASE + RK3588_CPUB_PVTPLL_CON0_L, in clk_cpub23_set_rate()
|