Searched refs:AP806_CA72MP2_0_PLL_SR_BASE (Results 1 – 1 of 1) sorted by relevance
36 #define AP806_CA72MP2_0_PLL_SR_BASE (MVEBU_REGS_BASE + 0x6F8C94) macro54 #define CLK_RATIO_STATE_REG AP806_CA72MP2_0_PLL_SR_BASE