Searched refs:QM_FVT_CFG_RDY_BIT (Results 1 – 1 of 1) sorted by relevance
| /optee_os/core/drivers/crypto/hisilicon/ |
| H A D | hisi_qm.c | 8 #define QM_FVT_CFG_RDY_BIT 0x1 macro
81 #define QM_CQE_PHASE(cqe) (((cqe)->w7) & QM_FVT_CFG_RDY_BIT)
295 val & QM_FVT_CFG_RDY_BIT, POLL_PERIOD, in qm_set_vft_common()
306 io_write32(qm->io_base + QM_VFT_CFG_OP_ENABLE, QM_FVT_CFG_RDY_BIT); in qm_set_vft_common()
309 val & QM_FVT_CFG_RDY_BIT, POLL_PERIOD, in qm_set_vft_common()
516 io_write32(qm->io_base + QM_CACHE_WB_START, QM_FVT_CFG_RDY_BIT); in qm_cache_writeback()
519 val & QM_FVT_CFG_RDY_BIT, POLL_PERIOD, in qm_cache_writeback()
536 io_write32(qm->io_base + QM_MEM_START_INIT, QM_FVT_CFG_RDY_BIT); in qm_hw_mem_reset()
539 val & QM_FVT_CFG_RDY_BIT, POLL_PERIOD, in qm_hw_mem_reset()
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