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Searched refs:DDR3PHY_DSGCR_ODTPDD_ODT0 (Results 1 – 2 of 2) sorted by relevance

/optee_os/core/include/drivers/sam/
H A Dsama7-ddr.h48 #define DDR3PHY_DSGCR_ODTPDD_ODT0 BIT(20) /* ODT[0] Power Down Driver */ macro
/optee_os/core/drivers/pm/sam/
H A Dpm_suspend.S174 orr tmp1, tmp1, #DDR3PHY_DSGCR_ODTPDD_ODT0
200 bic tmp1, tmp1, #DDR3PHY_DSGCR_ODTPDD_ODT0