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Searched refs:wr_cfg (Results 1 – 25 of 38) sorted by relevance

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/OK3568_Linux_fs/external/mpp/mpp/hal/rkdec/h264d/
H A Dhal_h264d_vdpu34x.c1019 MppDevRegWrCfg wr_cfg; in vdpu34x_h264d_start() local
1022 wr_cfg.reg = &regs->common; in vdpu34x_h264d_start()
1023 wr_cfg.size = sizeof(regs->common); in vdpu34x_h264d_start()
1024 wr_cfg.offset = OFFSET_COMMON_REGS; in vdpu34x_h264d_start()
1026 ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg); in vdpu34x_h264d_start()
1032 wr_cfg.reg = &regs->h264d_param; in vdpu34x_h264d_start()
1033 wr_cfg.size = sizeof(regs->h264d_param); in vdpu34x_h264d_start()
1034 wr_cfg.offset = OFFSET_CODEC_PARAMS_REGS; in vdpu34x_h264d_start()
1036 ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg); in vdpu34x_h264d_start()
1042 wr_cfg.reg = &regs->common_addr; in vdpu34x_h264d_start()
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H A Dhal_h264d_vdpu382.c1096 MppDevRegWrCfg wr_cfg; in vdpu382_h264d_start() local
1099 wr_cfg.reg = &regs->common; in vdpu382_h264d_start()
1100 wr_cfg.size = sizeof(regs->common); in vdpu382_h264d_start()
1101 wr_cfg.offset = OFFSET_COMMON_REGS; in vdpu382_h264d_start()
1103 ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg); in vdpu382_h264d_start()
1109 wr_cfg.reg = &regs->h264d_param; in vdpu382_h264d_start()
1110 wr_cfg.size = sizeof(regs->h264d_param); in vdpu382_h264d_start()
1111 wr_cfg.offset = OFFSET_CODEC_PARAMS_REGS; in vdpu382_h264d_start()
1113 ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg); in vdpu382_h264d_start()
1119 wr_cfg.reg = &regs->common_addr; in vdpu382_h264d_start()
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/OK3568_Linux_fs/external/mpp/mpp/hal/rkdec/avs2d/
H A Dhal_avs2d_rkv.c848 MppDevRegWrCfg wr_cfg; in hal_avs2d_rkv_start() local
851 wr_cfg.reg = &regs->common; in hal_avs2d_rkv_start()
852 wr_cfg.size = sizeof(regs->common); in hal_avs2d_rkv_start()
853 wr_cfg.offset = OFFSET_COMMON_REGS; in hal_avs2d_rkv_start()
855 ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg); in hal_avs2d_rkv_start()
862 wr_cfg.reg = &regs->avs2d_param; in hal_avs2d_rkv_start()
863 wr_cfg.size = sizeof(regs->avs2d_param); in hal_avs2d_rkv_start()
864 wr_cfg.offset = OFFSET_CODEC_PARAMS_REGS; in hal_avs2d_rkv_start()
866 ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg); in hal_avs2d_rkv_start()
873 wr_cfg.reg = &regs->common_addr; in hal_avs2d_rkv_start()
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H A Dhal_avs2d_vdpu382.c923 MppDevRegWrCfg wr_cfg; in hal_avs2d_vdpu382_start() local
926 wr_cfg.reg = &regs->common; in hal_avs2d_vdpu382_start()
927 wr_cfg.size = sizeof(regs->common); in hal_avs2d_vdpu382_start()
928 wr_cfg.offset = OFFSET_COMMON_REGS; in hal_avs2d_vdpu382_start()
930 ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg); in hal_avs2d_vdpu382_start()
937 wr_cfg.reg = &regs->avs2d_param; in hal_avs2d_vdpu382_start()
938 wr_cfg.size = sizeof(regs->avs2d_param); in hal_avs2d_vdpu382_start()
939 wr_cfg.offset = OFFSET_CODEC_PARAMS_REGS; in hal_avs2d_vdpu382_start()
941 ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg); in hal_avs2d_vdpu382_start()
948 wr_cfg.reg = &regs->common_addr; in hal_avs2d_vdpu382_start()
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/OK3568_Linux_fs/external/mpp/mpp/hal/rkdec/h265d/
H A Dhal_h265d_vdpu382.c985 MppDevRegWrCfg wr_cfg; in hal_h265d_vdpu382_start() local
988 wr_cfg.reg = &hw_regs->common; in hal_h265d_vdpu382_start()
989 wr_cfg.size = sizeof(hw_regs->common); in hal_h265d_vdpu382_start()
990 wr_cfg.offset = OFFSET_COMMON_REGS; in hal_h265d_vdpu382_start()
992 ret = mpp_dev_ioctl(reg_ctx->dev, MPP_DEV_REG_WR, &wr_cfg); in hal_h265d_vdpu382_start()
998 wr_cfg.reg = &hw_regs->h265d_param; in hal_h265d_vdpu382_start()
999 wr_cfg.size = sizeof(hw_regs->h265d_param); in hal_h265d_vdpu382_start()
1000 wr_cfg.offset = OFFSET_CODEC_PARAMS_REGS; in hal_h265d_vdpu382_start()
1002 ret = mpp_dev_ioctl(reg_ctx->dev, MPP_DEV_REG_WR, &wr_cfg); in hal_h265d_vdpu382_start()
1008 wr_cfg.reg = &hw_regs->common_addr; in hal_h265d_vdpu382_start()
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H A Dhal_h265d_vdpu34x.c1174 MppDevRegWrCfg wr_cfg; in hal_h265d_vdpu34x_start() local
1177 wr_cfg.reg = &hw_regs->common; in hal_h265d_vdpu34x_start()
1178 wr_cfg.size = sizeof(hw_regs->common); in hal_h265d_vdpu34x_start()
1179 wr_cfg.offset = OFFSET_COMMON_REGS; in hal_h265d_vdpu34x_start()
1181 ret = mpp_dev_ioctl(reg_ctx->dev, MPP_DEV_REG_WR, &wr_cfg); in hal_h265d_vdpu34x_start()
1187 wr_cfg.reg = &hw_regs->h265d_param; in hal_h265d_vdpu34x_start()
1188 wr_cfg.size = sizeof(hw_regs->h265d_param); in hal_h265d_vdpu34x_start()
1189 wr_cfg.offset = OFFSET_CODEC_PARAMS_REGS; in hal_h265d_vdpu34x_start()
1191 ret = mpp_dev_ioctl(reg_ctx->dev, MPP_DEV_REG_WR, &wr_cfg); in hal_h265d_vdpu34x_start()
1197 wr_cfg.reg = &hw_regs->common_addr; in hal_h265d_vdpu34x_start()
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/OK3568_Linux_fs/external/mpp/mpp/hal/vpu/jpege/
H A Dhal_jpege_vepu1_v2.c412 MppDevRegWrCfg wr_cfg; in hal_jpege_vepu1_start() local
416 wr_cfg.reg = ctx->regs; in hal_jpege_vepu1_start()
417 wr_cfg.size = reg_size; in hal_jpege_vepu1_start()
418 wr_cfg.offset = 0; in hal_jpege_vepu1_start()
420 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg); in hal_jpege_vepu1_start()
547 MppDevRegWrCfg wr_cfg; in hal_jpege_vepu1_part_start() local
551 wr_cfg.reg = ctx->regs; in hal_jpege_vepu1_part_start()
552 wr_cfg.size = reg_size; in hal_jpege_vepu1_part_start()
553 wr_cfg.offset = 0; in hal_jpege_vepu1_part_start()
555 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg); in hal_jpege_vepu1_part_start()
H A Dhal_jpege_vepu2_v2.c700 MppDevRegWrCfg wr_cfg; in multi_core_start() local
703 wr_cfg.reg = regs; in multi_core_start()
704 wr_cfg.size = reg_size; in multi_core_start()
705 wr_cfg.offset = 0; in multi_core_start()
707 ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg); in multi_core_start()
815 MppDevRegWrCfg wr_cfg; in hal_jpege_vepu2_start() local
819 wr_cfg.reg = ctx->regs; in hal_jpege_vepu2_start()
820 wr_cfg.size = reg_size; in hal_jpege_vepu2_start()
821 wr_cfg.offset = 0; in hal_jpege_vepu2_start()
823 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg); in hal_jpege_vepu2_start()
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/OK3568_Linux_fs/external/mpp/mpp/hal/rkdec/vp9d/
H A Dhal_vp9d_vdpu382.c927 MppDevRegWrCfg wr_cfg; in hal_vp9d_vdpu382_start() local
930 wr_cfg.reg = &hw_regs->common; in hal_vp9d_vdpu382_start()
931 wr_cfg.size = sizeof(hw_regs->common); in hal_vp9d_vdpu382_start()
932 wr_cfg.offset = OFFSET_COMMON_REGS; in hal_vp9d_vdpu382_start()
934 ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg); in hal_vp9d_vdpu382_start()
940 wr_cfg.reg = &hw_regs->vp9d_param; in hal_vp9d_vdpu382_start()
941 wr_cfg.size = sizeof(hw_regs->vp9d_param); in hal_vp9d_vdpu382_start()
942 wr_cfg.offset = OFFSET_CODEC_PARAMS_REGS; in hal_vp9d_vdpu382_start()
944 ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg); in hal_vp9d_vdpu382_start()
950 wr_cfg.reg = &hw_regs->common_addr; in hal_vp9d_vdpu382_start()
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H A Dhal_vp9d_vdpu34x.c893 MppDevRegWrCfg wr_cfg; in hal_vp9d_vdpu34x_start() local
896 wr_cfg.reg = &hw_regs->common; in hal_vp9d_vdpu34x_start()
897 wr_cfg.size = sizeof(hw_regs->common); in hal_vp9d_vdpu34x_start()
898 wr_cfg.offset = OFFSET_COMMON_REGS; in hal_vp9d_vdpu34x_start()
900 ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg); in hal_vp9d_vdpu34x_start()
906 wr_cfg.reg = &hw_regs->vp9d_param; in hal_vp9d_vdpu34x_start()
907 wr_cfg.size = sizeof(hw_regs->vp9d_param); in hal_vp9d_vdpu34x_start()
908 wr_cfg.offset = OFFSET_CODEC_PARAMS_REGS; in hal_vp9d_vdpu34x_start()
910 ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg); in hal_vp9d_vdpu34x_start()
916 wr_cfg.reg = &hw_regs->common_addr; in hal_vp9d_vdpu34x_start()
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H A Dhal_vp9d_rkv.c544 MppDevRegWrCfg wr_cfg; in hal_vp9d_rkv_start() local
548 wr_cfg.reg = hw_ctx->hw_regs; in hal_vp9d_rkv_start()
549 wr_cfg.size = reg_size; in hal_vp9d_rkv_start()
550 wr_cfg.offset = 0; in hal_vp9d_rkv_start()
552 ret = mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg); in hal_vp9d_rkv_start()
/OK3568_Linux_fs/external/mpp/mpp/hal/rkenc/h264e/
H A Dhal_h264e_vepu540c.c1586 MppDevRegWrCfg wr_cfg; in hal_h264e_vepu540c_start() local
1589 wr_cfg.reg = &ctx->regs_set->reg_ctl; in hal_h264e_vepu540c_start()
1590 wr_cfg.size = sizeof(ctx->regs_set->reg_ctl); in hal_h264e_vepu540c_start()
1591 wr_cfg.offset = VEPU540C_CTL_OFFSET; in hal_h264e_vepu540c_start()
1595 RK_U32 *reg = (RK_U32)wr_cfg.reg; in hal_h264e_vepu540c_start()
1603 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg); in hal_h264e_vepu540c_start()
1608 wr_cfg.reg = &ctx->regs_set->reg_base; in hal_h264e_vepu540c_start()
1609 wr_cfg.size = sizeof(ctx->regs_set->reg_base); in hal_h264e_vepu540c_start()
1610 wr_cfg.offset = VEPU540C_BASE_OFFSET; in hal_h264e_vepu540c_start()
1612 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg); in hal_h264e_vepu540c_start()
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H A Dhal_h264e_vepu580.c2277 MppDevRegWrCfg wr_cfg; in hal_h264e_vepu580_start() local
2280 wr_cfg.reg = &regs->reg_ctl; in hal_h264e_vepu580_start()
2281 wr_cfg.size = sizeof(regs->reg_ctl); in hal_h264e_vepu580_start()
2282 wr_cfg.offset = VEPU580_CONTROL_CFG_OFFSET; in hal_h264e_vepu580_start()
2286 RK_U32 *reg = (RK_U32)wr_cfg.reg; in hal_h264e_vepu580_start()
2294 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg); in hal_h264e_vepu580_start()
2299 wr_cfg.reg = &regs->reg_base; in hal_h264e_vepu580_start()
2300 wr_cfg.size = sizeof(regs->reg_base); in hal_h264e_vepu580_start()
2301 wr_cfg.offset = VEPU580_BASE_CFG_OFFSET; in hal_h264e_vepu580_start()
2303 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg); in hal_h264e_vepu580_start()
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/OK3568_Linux_fs/external/mpp/mpp/hal/vpu/h263d/
H A Dhal_h263d_vdpu2.c248 MppDevRegWrCfg wr_cfg; in hal_vpu2_h263d_start() local
251 wr_cfg.reg = regs; in hal_vpu2_h263d_start()
252 wr_cfg.size = sizeof(Vpu2H263dRegSet_t); in hal_vpu2_h263d_start()
253 wr_cfg.offset = 0; in hal_vpu2_h263d_start()
255 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg); in hal_vpu2_h263d_start()
H A Dhal_h263d_vdpu1.c247 MppDevRegWrCfg wr_cfg; in hal_vpu1_h263d_start() local
250 wr_cfg.reg = regs; in hal_vpu1_h263d_start()
251 wr_cfg.size = sizeof(Vpu1H263dRegSet_t); in hal_vpu1_h263d_start()
252 wr_cfg.offset = 0; in hal_vpu1_h263d_start()
254 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg); in hal_vpu1_h263d_start()
/OK3568_Linux_fs/external/mpp/mpp/hal/rkenc/common/
H A Dvepu541_common.c618 MppDevRegWrCfg wr_cfg; in vepu541_set_osd() local
620 wr_cfg.reg = plt_cfg->plt; in vepu541_set_osd()
621 wr_cfg.size = sizeof(MppEncOSDPlt); in vepu541_set_osd()
622 wr_cfg.offset = VEPU541_REG_BASE_OSD_PLT; in vepu541_set_osd()
624 mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg); in vepu541_set_osd()
822 MppDevRegWrCfg wr_cfg; in vepu540_set_osd() local
824 wr_cfg.reg = plt_cfg->plt; in vepu540_set_osd()
825 wr_cfg.size = sizeof(MppEncOSDPlt); in vepu540_set_osd()
826 wr_cfg.offset = VEPU541_REG_BASE_OSD_PLT; in vepu540_set_osd()
827 mpp_dev_ioctl(dev, MPP_DEV_REG_WR, &wr_cfg); in vepu540_set_osd()
/OK3568_Linux_fs/external/mpp/mpp/hal/vpu/m2vd/
H A Dhal_m2vd_vdpu1.c265 MppDevRegWrCfg wr_cfg; in hal_m2vd_vdpu1_start() local
270 wr_cfg.reg = regs; in hal_m2vd_vdpu1_start()
271 wr_cfg.size = reg_size; in hal_m2vd_vdpu1_start()
272 wr_cfg.offset = 0; in hal_m2vd_vdpu1_start()
274 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg); in hal_m2vd_vdpu1_start()
H A Dhal_m2vd_vdpu2.c337 MppDevRegWrCfg wr_cfg; in hal_m2vd_vdpu2_start() local
342 wr_cfg.reg = regs; in hal_m2vd_vdpu2_start()
343 wr_cfg.size = reg_size; in hal_m2vd_vdpu2_start()
344 wr_cfg.offset = 0; in hal_m2vd_vdpu2_start()
346 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg); in hal_m2vd_vdpu2_start()
/OK3568_Linux_fs/external/mpp/mpp/hal/vpu/mpg4d/
H A Dhal_m4vd_vdpu1.c416 MppDevRegWrCfg wr_cfg; in vdpu1_mpg4d_start() local
420 wr_cfg.reg = regs; in vdpu1_mpg4d_start()
421 wr_cfg.size = reg_size; in vdpu1_mpg4d_start()
422 wr_cfg.offset = 0; in vdpu1_mpg4d_start()
424 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg); in vdpu1_mpg4d_start()
H A Dhal_m4vd_vdpu2.c414 MppDevRegWrCfg wr_cfg; in vdpu2_mpg4d_start() local
418 wr_cfg.reg = regs; in vdpu2_mpg4d_start()
419 wr_cfg.size = reg_size; in vdpu2_mpg4d_start()
420 wr_cfg.offset = 0; in vdpu2_mpg4d_start()
422 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg); in vdpu2_mpg4d_start()
/OK3568_Linux_fs/external/mpp/mpp/hal/rkdec/avsd/
H A Dhal_avsd_vdpu2.c577 MppDevRegWrCfg wr_cfg; in hal_avsd_vdpu2_start() local
581 wr_cfg.reg = p_hal->p_regs; in hal_avsd_vdpu2_start()
582 wr_cfg.size = reg_size; in hal_avsd_vdpu2_start()
583 wr_cfg.offset = 0; in hal_avsd_vdpu2_start()
585 ret = mpp_dev_ioctl(p_hal->dev, MPP_DEV_REG_WR, &wr_cfg); in hal_avsd_vdpu2_start()
/OK3568_Linux_fs/external/mpp/mpp/hal/vpu/jpegd/
H A Dhal_jpegd_rkv.c657 MppDevRegWrCfg wr_cfg; in hal_jpegd_rkv_start() local
662 wr_cfg.reg = regs; in hal_jpegd_rkv_start()
663 wr_cfg.size = reg_size; in hal_jpegd_rkv_start()
664 wr_cfg.offset = 0; in hal_jpegd_rkv_start()
672 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg); in hal_jpegd_rkv_start()
/OK3568_Linux_fs/external/mpp/mpp/hal/vpu/vp8d/
H A Dhal_vp8d_vdpu2.c643 MppDevRegWrCfg wr_cfg; in hal_vp8d_vdpu2_start() local
647 wr_cfg.reg = regs; in hal_vp8d_vdpu2_start()
648 wr_cfg.size = reg_size; in hal_vp8d_vdpu2_start()
649 wr_cfg.offset = 0; in hal_vp8d_vdpu2_start()
651 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg); in hal_vp8d_vdpu2_start()
H A Dhal_vp8d_vdpu1.c641 MppDevRegWrCfg wr_cfg; in hal_vp8d_vdpu1_start() local
645 wr_cfg.reg = regs; in hal_vp8d_vdpu1_start()
646 wr_cfg.size = reg_size; in hal_vp8d_vdpu1_start()
647 wr_cfg.offset = 0; in hal_vp8d_vdpu1_start()
649 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg); in hal_vp8d_vdpu1_start()
/OK3568_Linux_fs/external/mpp/mpp/hal/vpu/h264e/
H A Dhal_h264e_vepu1_v2.c586 MppDevRegWrCfg wr_cfg; in hal_h264e_vepu1_start_v2() local
591 wr_cfg.reg = &ctx->regs_set; in hal_h264e_vepu1_start_v2()
592 wr_cfg.size = reg_size; in hal_h264e_vepu1_start_v2()
593 wr_cfg.offset = 0; in hal_h264e_vepu1_start_v2()
595 ret = mpp_dev_ioctl(ctx->dev, MPP_DEV_REG_WR, &wr_cfg); in hal_h264e_vepu1_start_v2()

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