Home
last modified time | relevance | path

Searched refs:training_lane (Results 1 – 6 of 6) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/video/drm/
H A Danalogix_dp.c129 dp->link_train.training_lane[lane] = in analogix_dp_link_start()
225 u8 voltage_swing, pre_emphasis, training_lane; in analogix_dp_get_adjust_training_lane() local
233 training_lane = DPCD_VOLTAGE_SWING_SET(voltage_swing) | in analogix_dp_get_adjust_training_lane()
237 training_lane |= DP_TRAIN_MAX_SWING_REACHED; in analogix_dp_get_adjust_training_lane()
239 training_lane |= DP_TRAIN_MAX_PRE_EMPHASIS_REACHED; in analogix_dp_get_adjust_training_lane()
241 dp->link_train.training_lane[lane] = training_lane; in analogix_dp_get_adjust_training_lane()
261 u8 voltage_swing, pre_emphasis, training_lane; in analogix_dp_process_clock_recovery() local
299 training_lane = analogix_dp_get_lane_link_training( in analogix_dp_process_clock_recovery()
306 if (DPCD_VOLTAGE_SWING_GET(training_lane) == in analogix_dp_process_clock_recovery()
308 DPCD_PRE_EMPHASIS_GET(training_lane) == in analogix_dp_process_clock_recovery()
[all …]
H A Danalogix_dp_reg.c998 u8 training_lane = dp->link_train.training_lane[lane]; in analogix_dp_set_lane_link_training() local
1003 dp->link_train.training_lane[lane]); in analogix_dp_set_lane_link_training()
1005 vs = (training_lane & DP_TRAIN_VOLTAGE_SWING_MASK) >> in analogix_dp_set_lane_link_training()
1007 pe = (training_lane & DP_TRAIN_PRE_EMPHASIS_MASK) >> in analogix_dp_set_lane_link_training()
H A Danalogix_dp.h600 u8 training_lane[4]; member
/OK3568_Linux_fs/kernel/drivers/gpu/drm/bridge/analogix/
H A Danalogix_dp_core.c366 dp->link_train.training_lane[lane] = in analogix_dp_link_start()
464 u8 voltage_swing, pre_emphasis, training_lane; in analogix_dp_get_adjust_training_lane() local
472 training_lane = DPCD_VOLTAGE_SWING_SET(voltage_swing) | in analogix_dp_get_adjust_training_lane()
476 training_lane |= DP_TRAIN_MAX_SWING_REACHED; in analogix_dp_get_adjust_training_lane()
478 training_lane |= DP_TRAIN_MAX_PRE_EMPHASIS_REACHED; in analogix_dp_get_adjust_training_lane()
480 dp->link_train.training_lane[lane] = training_lane; in analogix_dp_get_adjust_training_lane()
500 u8 voltage_swing, pre_emphasis, training_lane; in analogix_dp_process_clock_recovery() local
537 training_lane = analogix_dp_get_lane_link_training( in analogix_dp_process_clock_recovery()
544 if (DPCD_VOLTAGE_SWING_GET(training_lane) == in analogix_dp_process_clock_recovery()
546 DPCD_PRE_EMPHASIS_GET(training_lane) == in analogix_dp_process_clock_recovery()
[all …]
H A Danalogix_dp_reg.c649 dp->link_train.training_lane[lane]); in analogix_dp_set_lane_link_training()
655 u8 training_lane = dp->link_train.training_lane[lane]; in analogix_dp_set_lane_link_training() local
658 vs = (training_lane & DP_TRAIN_VOLTAGE_SWING_MASK) >> in analogix_dp_set_lane_link_training()
660 pe = (training_lane & DP_TRAIN_PRE_EMPHASIS_MASK) >> in analogix_dp_set_lane_link_training()
H A Danalogix_dp_core.h154 u8 training_lane[4]; member