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Searched refs:tile_num (Results 1 – 9 of 9) sorted by relevance

/OK3568_Linux_fs/external/mpp/mpp/codec/dec/av1/
H A Dav1d_parser.c521 RK_S16 tile_num; in get_tiles_info() local
531 for (tile_num = tile_group->tg_start; tile_num <= tile_group->tg_end; tile_num++) { in get_tiles_info()
532 if (tile_num == tile_group->tg_end) { in get_tiles_info()
533 s->tile_offset_start[tile_num] = bytestream_tell(&gb) + s->tile_offset; in get_tiles_info()
534 …s->tile_offset_end[tile_num] = bytestream_tell(&gb) + bytestream_get_bytes_left(&gb) + s->tile_off… in get_tiles_info()
535 s->tile_offset = s->tile_offset_end[tile_num]; in get_tiles_info()
548 s->tile_offset_start[tile_num] = bytestream_tell(&gb) + s->tile_offset; in get_tiles_info()
550 s->tile_offset_end[tile_num] = bytestream_tell(&gb) + size + s->tile_offset; in get_tiles_info()
1024 if (raw_tile_group && (s->tile_num == raw_tile_group->tg_end + 1)) { in av1d_parser_frame()
H A Dav1d_parser.h116 RK_S32 tile_num; member
H A Dav1d_cbs.c2178 ctx->tile_num = 0; in mpp_av1_frame_header_obu()
2222 fc(tile_bits, tg_start, ctx->tile_num, num_tiles - 1); in mpp_av1_tile_group_obu()
2226 ctx->tile_num = current->tg_end + 1; in mpp_av1_tile_group_obu()
3050 ctx->tile_num = 0; in mpp_av1_flush()
/OK3568_Linux_fs/external/mpp/mpp/hal/rkenc/h265e/
H A Dhal_h265e_vepu580.c128 RK_U32 tile_num; member
2332 … RK_U32 tile_num = (syn->pp.num_tile_columns_minus1 + 1) * (syn->pp.num_tile_rows_minus1 + 1); in vepu580_h265_set_hw_address() local
2347 mpp_buffer_get(ctx->tile_grp, &ctx->hw_tile_stream[0], ctx->frame_size / tile_num); in vepu580_h265_set_hw_address()
2350 if (tile_num > 2) { in vepu580_h265_set_hw_address()
2352 mpp_buffer_get(ctx->tile_grp, &ctx->hw_tile_stream[1], ctx->frame_size / tile_num); in vepu580_h265_set_hw_address()
2355 mpp_buffer_get(ctx->tile_grp, &ctx->hw_tile_stream[2], ctx->frame_size / tile_num); in vepu580_h265_set_hw_address()
2706 RK_U32 tile_num = (syn->pp.num_tile_columns_minus1 + 1) * (syn->pp.num_tile_rows_minus1 + 1); in hal_h265e_v580_start() local
2711 ctx->tile_num = tile_num; in hal_h265e_v580_start()
2719 if (tile_num > MAX_TILE_NUM) { in hal_h265e_v580_start()
2720 mpp_log("tile_num big then support %d, max %d", tile_num, MAX_TILE_NUM); in hal_h265e_v580_start()
[all …]
H A Dhal_h265e_vepu580_tune.c481 for (i = 0; i < (RK_S32)ctx->tile_num; i++) { in vepu580_h265e_tune_stat_update()
/OK3568_Linux_fs/kernel/drivers/net/ethernet/huawei/hinic/
H A Dhinic_hw_dev.h339 u32 tile_num; member
/OK3568_Linux_fs/kernel/drivers/gpu/drm/rockchip/
H A Drockchip_vop2_reg.c1932 .tile_num = VOP_REG(RK3568_CLUSTER0_WIN0_AFBCD_VIR_WIDTH, 0xffff, 16),
1983 .tile_num = VOP_REG(RK3568_CLUSTER1_WIN0_AFBCD_VIR_WIDTH, 0xffff, 16),
2013 .tile_num = VOP_REG(RK3588_CLUSTER2_WIN0_AFBCD_VIR_WIDTH, 0xffff, 16),
2043 .tile_num = VOP_REG(RK3588_CLUSTER3_WIN0_AFBCD_VIR_WIDTH, 0xffff, 16),
H A Drockchip_drm_vop.h457 struct vop_reg tile_num; member
H A Drockchip_drm_vop2.c5297 VOP_AFBC_SET(vop2, win, tile_num, afbc_tile_num); in vop2_win_atomic_update()